Inventor

PENG CHING-NEN

TW52 patents

⚠️ This page may combine multiple inventors who share the name “PENG CHING-NEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PENG CHING-NEN

TAIWAN SEMICONDUCTOR MFG CO LTD

Testing holders for chip unit and die package

Testing holders for chip unit and die package

Testing holders for chip unit and die package

Three dimensional integrated circuit electrostatic discharge protection and prevention test interface

Testing holders for chip unit and die package

3D IC testing apparatus

Three dimensional integrated circuit electrostatic discharge protection and prevention test interface

Alignment testing for tiered semiconductor structure

Integrated circuit test system and method

Testing holders for chip unit and die package

Three dimensional integrated circuit electrostatic discharge protection and prevention test interface

Circuit probing structures and methods for probing the same

Structure and method for testing stacked CMOS structure

Integrated fan-out package-on-package testing

Alignment testing for tiered semiconductor structure

Alignment testing for tiered semiconductor structure

Test circuit and method

Composite integrated circuits and methods for wireless interactions therewith

Testing holders for chip unit and die package

Three dimensional integrated circuit electrostatic discharge protection and prevention test interface

Composite integrated circuits and methods for wireless interactions therewith

Alignment testing for tiered semiconductor structure

Test circuit and method

Test circuit and method

Devices for high-density probing techniques and method of implementing the same

Electromagnetic shielding during wafer stage testing

Systems for probing semiconductor wafers

Composite integrated circuits and methods for wireless interactions therewith

Test circuit and method

Composite integrated circuits and methods for wireless interactions therewith

Test circuit and method

Method and apparatus of wafer testing

Devices for high-density probing techniques and method of implementing the same

Devices for high-density probing techniques and method of implementing the same

Test-yield improvement devices for high-density probing techniques and method of implementing the same

Semiconductor device and manufacturing method thereof

Integrated fan-out wafer architecture and test method

Capacitance measurement circuit and method

WANG MILL-JER

Three-dimensional integrated circuit and method for wireless information access thereof

Probe cards for probing integrated circuits

3D IC testing apparatus

Power compensation in 3DIC testing

Circuit probing structures and methods for probing the same

Methods for probing semiconductor wafers

Dynamic testing based on thermal and stress conditions

Production flow and reusable testing method

LIN HUNG-CHIH

Test structures for through silicon vias (TSVs) of three dimensional integrated circuit (3DIC)

Method of testing through silicon VIAS (TSVs) of three dimensional integrated circuit (3DIC)

TAIWAN SEMICONDUCTOR MFG

Testing holders for chip unit and die package

CHEN CHUN-CHENG

Adaptive test sequence for testing integrated circuits