Inventor

YANG HUI-TING

TW41 patents

⚠️ This page may combine multiple inventors who share the name “YANG HUI-TING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YANG HUI-TING

TAIWAN SEMICONDUCTOR MFG CO LTD

Semiconductor device integrating backside power grid and related integrated circuit and fabrication method

Method of manufacturing semiconductor device

Metal with buried power for increased IC device density

Metal rail conductors for non-planar semiconductor devices

Metal rail conductors for non-planar semiconductor devices

Metal patterning for internal cell routing

Method of manufacturing conductors and semiconductor device which includes conductors

Method of manufacturing semiconductor device

Method and system of manufacturing conductors and semiconductor device which includes conductors

Semiconductor device including cell region having more similar cell densities in different height rows, and method and system for generating layout diagram of same

Metal patterning for internal cell routing

Local interconnect structure

Method and system of manufacturing conductors and semiconductor device which includes conductors

Semiconductor device including cell region having more similar cell densities in different height rows, and method and system for generating layout diagram of same

Semiconductor device and fabrication method of the same

Layout modification method and system

Dummy MOL removal for performance enhancement

Semiconductor device integrating backside power grid and related integrated circuit and fabrication method

Semiconductor device integrating backside power grid and related integrated circuit and fabrication method

Metal patterning for internal cell routing

Method of manufacturing semiconductor device

Advanced metal connection with metal cut

Dummy MOL removal for performance enhancement

Method of manufacturing conductors for semiconductor device

Semiconductor device having more similar cell densities in alternating rows

Multiple fin height integrated circuit

Method for routing local interconnect structure at same level as reference metal line

Method of forming semiconductor device having more similar cell densities in alternating rows

Multiple fin height integrated circuit

Method of making standard cells having via rail and deep via structures

Standard cells having via rail and deep via structures

Semiconductor device, associated method and layout

Advanced metal connection with metal cut

Dummy MOL removal for performance enhancement

Advanced metal connection with metal cut

Method of adjusting metal line pitch

Advanced metal connection with metal cut

GLOBAL UNICHIP CORP

Circuit for providing clock to de-serializer in communication physical layer

Frame decoding circuit and method for performing frame decoding

HSU FU-LIANG

Method of heating thermal print unit of dye sublimation printer

LIN YOUN-LONG

Compression method for display frames of QFHD (quad full high definition) resolution and system thereof