P

Inventor

MAHAJAN RAVINDRANATH

US30 patents
⚠️ This page may combine multiple inventors who share the name “MAHAJAN RAVINDRANATH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

29 patents
US10236209B2Mar 19, 2019

Passive components in vias in a stacked integrated circuit package

INTEL CORP22 citations94
US11581235B2Feb 14, 2023

IC package including multi-chip unit with bonded integrated heat spreader

INTEL CORP4 citations85
US11011448B2May 18, 2021

IC package including multi-chip unit with bonded integrated heat spreader

INTEL CORP9 citations85
US11798865B2Oct 24, 2023

Nested architectures for enhanced heterogeneous integration

INTEL CORP1 citations73
US11749577B2Sep 5, 2023

IC package including multi-chip unit with bonded integrated heat spreader

INTEL CORP2 citations73
US11742261B2Aug 29, 2023

Nested architectures for enhanced heterogeneous integration

INTEL CORP2 citations73
US10601426B1Mar 24, 2020

Programmable logic device with fine-grained disaggregation

INTEL CORP2 citations73
US9713255B2Jul 18, 2017

Electro-magnetic interference (EMI) shielding techniques and configurations

INTEL CORP2 citations73
US12238892B2Feb 25, 2025

Immersion cooling for integrated circuit devices

INTEL CORP3 citations72
US11824018B2Nov 21, 2023

Heterogeneous nested interposer package for IC chips

INTEL CORP3 citations72
US11735533B2Aug 22, 2023

Heterogeneous nested interposer package for IC chips

INTEL CORP2 citations72
US12243806B2Mar 4, 2025

Nested architectures for enhanced heterogeneous integration

INTEL CORP0 citations62
US12224103B2Feb 11, 2025

Angled inductor with small form factor

INTEL CORP1 citations62
US12206410B2Jan 21, 2025

Programmable logic device with fine-grained disaggregation

INTEL CORP0 citations62
US12183649B2Dec 31, 2024

IC package including multi-chip unit with bonded integrated heat spreader

INTEL CORP0 citations62
US12142545B2Nov 12, 2024

Nested architectures for enhanced heterogeneous integration

INTEL CORP0 citations62
US11804418B2Oct 31, 2023

Direct liquid micro jet (DLMJ) structures for addressing thermal performance at limited flow rate conditions

INTEL CORP1 citations62
US11595045B2Feb 28, 2023

Programmable logic device with fine-grained disaggregation

INTEL CORP0 citations62
US11070209B2Jul 20, 2021

Programmable logic device with fine-grained disaggregation

INTEL CORP0 citations62
US11031288B2Jun 8, 2021

Passive components in vias in a stacked integrated circuit package

INTEL CORP0 citations62
US10595409B2Mar 17, 2020

Electro-magnetic interference (EMI) shielding techniques and configurations

INTEL CORP1 citations62
US12272656B2Apr 8, 2025

Heterogeneous nested interposer package for IC chips

INTEL CORP0 citations61
US12199048B2Jan 14, 2025

Heterogeneous nested interposer package for IC chips

INTEL CORP0 citations61
US11756856B2Sep 12, 2023

Package architecture including thermoelectric cooler structures

INTEL CORP0 citations60
US11545407B2Jan 3, 2023

Thermal management solutions for integrated circuit packages

INTEL CORP0 citations60
US12074102B2Aug 27, 2024

Structural elements for application specific electronic device packages

INTEL CORP0 citations59
US12048123B2Jul 23, 2024

Heat dissipation device having shielding/containment extensions

INTEL CORP0 citations51
US12469801B2Nov 11, 2025

Moisture seal coating of hybrid bonded stacked die package assembly

INTEL CORP0 citations50
US12366713B2Jul 22, 2025

Heat dissipation structures for optical communication devices

INTEL CORP0 citations50

SWAMINATHAN RAJASEKARAN

1 patent