Inventor

TEE KHENG CHOK

MY24 patents

⚠️ This page may combine multiple inventors who share the name “TEE KHENG CHOK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TEE KHENG CHOK

CHARTERED SEMICONDUCTOR MFG

Material architecture for the fabrication of low temperature transistor

Passivation of copper interconnect surfaces with a passivating metal layer

Method to form a cross network of air gaps within IMD layer

Formation of low k dielectric

Method for fabricating void-free epitaxial-CoSi2 with ultra-shallow junctions

Device, design and method for a slot in a conductive area

Selective oxide trimming to improve metal T-gate transistor

Area array air gap structure for intermetal dielectric application

Method to make corner cross-grid structures in copper metallization

Low-leakage DRAM structures using selective silicon epitaxial growth (SEG) on an insulating layer

Method for making low-leakage DRAM structures using selective silicon epitaxial growth (SEG) on an insulating layer

Wing gate transistor for integrated circuits

Method of forming a partially depleted silicon on insulator (PDSOI) transistor with a pad lock body extension

Method of forming a partially depleted silicon on insulator (PDSOI) transistor with a pad lock body extension

Method to form a cross network of air gaps within IMD layer

Method of forming wing gate transistor for integrated circuits

Method of manufacturing a semiconductor device with a strained channel

Structure and method to form source and drain regions over doped depletion regions

GLOBALFOUNDRIES SG PTE LTD

Three-dimensional integrated circuit structures providing thermoelectric cooling and methods for cooling such integrated circuit structures

Programmable active cooling device

Integrated circuits with stressed semiconductor-on-insulator (SOI) body contacts and methods for fabricating the same

Structure and method to form source and drain regions over doped depletion regions

CHARTERED SEMICONDUCTOR MANU L

Passivation of copper interconnect surfaces with a passivating metal layer

CHARTERED SEMICONDUCTOR MFG CO

Formation of air gap structures for inter-metal dielectric application