Inventor

CHOI GIL-HEYUN

KR154 patents

⚠️ This page may combine multiple inventors who share the name “CHOI GIL-HEYUN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHOI GIL-HEYUN

SAMSUNG ELECTRONICS CO LTD

Method of forming semiconductor device having stacked transistors

Semiconductor device including upper and lower transistors and interconnection between upper and lower transistors

Methods of forming dual gate semiconductor devices having a metal nitride layer

Method of manufacturing a barrier metal layer using atomic layer deposition

Method for forming metal interconnection in semiconductor device and interconnection structure fabricated thereby

Method of forming metal nitride film by chemical vapor deposition and method of forming metal contact and capacitor of semiconductor device using the same

Conductive layer buried-type substrate, method of forming the conductive layer buried-type substrate, and method of fabricating semiconductor device using the conductive layer buried-type substrate

Stacked semiconductor device and method of fabrication

Semiconductor device having barrier layer between ruthenium layer and metal layer and method for manufacturing the same

Semiconductor devices having metal layers as barrier layers on upper or lower electrodes of capacitors

Method for forming metal layer of semiconductor device using metal halide gas

Method of forming metal layer using atomic layer deposition and semiconductor device having the metal layer as barrier metal layer or upper or lower electrode of capacitor

Methods of producing integrated circuit devices utilizing tantalum amine derivatives

Method for forming a wiring layer a semiconductor device

Methods of forming metal layers in integrated circuit devices using selective deposition on edges of recesses and conductive contacts so formed

Methods of forming electronic devices including high-k dielectric layers and electrode barrier layers

Method of fabricating metal lines in a semiconductor device

Method of selectively depositing a metal layer in an opening in a dielectric layer by forming a metal-deposition-prevention layer around the opening of the dielectric layer

Semiconductor chips having through silicon vias and related fabrication methods and semiconductor packages

Methods of forming silicide films with metal films in semiconductor devices and contacts including the same

Methods for forming atomic layers and thin films including tantalum nitride and devices including the same

Wafer processing apparatus and wafer processing method using the same

Wafer processing apparatus and wafer processing method using the same

Method for manufacturing a collimator

Method for forming metal layer of a semiconductor device

Methods of forming interlayer dielectrics having air gaps

Methods of producing integrated circuit devices utilizing tantalum amine derivatives

Semiconductor devices including high-k dielectric materials

Methods of forming gate structures for semiconductor devices

Method for forming a wiring of a semiconductor device, method for forming a metal layer of a semiconductor device and apparatus for performing the same

Methods of forming electronic devices including high-k dielectric layers and electrode barrier layers and related structures

Methods of forming cobalt layers for semiconductor devices

Methods for forming cobalt layers including introducing vaporized cobalt precursors and methods for manufacturing semiconductor devices using the same

Methods for forming a metal layer on a semiconductor

Methods for forming metal wiring layers and metal interconnects and metal interconnects formed thereby

Methods of forming metal layers in integrated circuit devices using selective deposition on edges of recesses

Methods of forming filled interconnections in microelectronic devices

PARK BYUNG-LYUL

Semiconductor device and method of fabricating the same including a conductive structure is formed through at least one dielectric layer after forming a via structure

Integrated circuit having through silicon via structure with minimized deterioration

Methods of manufacturing a semiconductor device

KIM SU-KYOUNG

Integrated circuit device including through-silicon via structure having offset interface

Non-volatile memory device

PARK JIN-HO

Method of manufacturing a semiconductor device

Methods of manufacturing semiconductor devices

BAEK JONG-MIN

Method of fabricating semiconductor device having buried wiring

MOON KWANG-JIN

Semiconductor device and method of fabricating the same

LEE HO-JIN

Via connection structures, semiconductor devices having the same, and methods of fabricating the structures and devices

KANG PIL-KYU

Buried-type optical input/output devices and methods of manufacturing the same

JUNG DEOK-YOUNG

Method of forming semiconductor device

CHOI KYUNG-IN

Method of manufacturing a metal wiring structure