Inventor
MORTEN ANDREW
US14 patents
Patents
14 patentsUS11068641B1Jul 20, 2021
Systems and methods for intelligently buffer tracking for optimized dataflow within an integrated circuit architecture
MYTHIC INC13 citations83
US11016810B1May 25, 2021
Tile subsystem and method for automated data flow and data processing within an integrated circuit architecture
MYTHIC INC15 citations83
US10452745B2Oct 22, 2019
Systems and methods for mapping matrix calculations to a matrix multiply accelerator
MYTHIC INC1 citations72
US10409889B2Sep 10, 2019
Systems and methods for mapping matrix calculations to a matrix multiply accelerator
MYTHIC INC2 citations72
US10929748B1Feb 23, 2021
Systems and methods for implementing operational transformations for restricted computations of a mixed-signal integrated circuit
MYTHIC INC6 citations71
US12406021B2Sep 2, 2025
Systems and methods for mapping matrix calculations to a matrix multiply accelerator
MYTHIC INC0 citations61
US11615165B2Mar 28, 2023
Systems and methods for mapping matrix calculations to a matrix multiply accelerator
MYTHIC INC0 citations61
US10977339B2Apr 13, 2021
Systems and methods for mapping matrix calculations to a matrix multiply accelerator
MYTHIC INC0 citations61
US12014214B2Jun 18, 2024
Tile subsystem and method for automated data flow and data processing within an integrated circuit architecture
MYTHIC INC0 citations60
US12260165B2Mar 25, 2025
Systems and methods for intelligently buffer tracking for optimized dataflow within an integrated circuit architecture
MYTHIC INC0 citations59
US11822376B2Nov 21, 2023
Systems and methods for intelligently buffer tracking for optimized dataflow within an integrated circuit architecture
MYTHIC INC0 citations59
US10515136B2Dec 24, 2019
Systems and methods for mapping matrix calculations to a matrix multiply accelerator
MYTHIC INC0 citations51
US11625519B2Apr 11, 2023
Systems and methods for intelligent graph-based buffer sizing for a mixed-signal integrated circuit
MYTHIC INC0 citations49
US12531129B1Jan 20, 2026
Systems and methods for implementing a feedback-informed memory programming of an integrated circuit
MYTHIC INC0 citations44