Inventor
CURELLO GIUSEPPE
US16 patents
⚠️ This page may combine multiple inventors who share the name “CURELLO GIUSEPPE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
9 patentsUS7335959B2Feb 26, 2008
Device with stepped source/drain region profile
INTEL CORP92 citations97
US7943468B2May 17, 2011
Penetrating implant for forming a semiconductor device
INTEL CORP20 citations92
US7541239B2Jun 2, 2009
Selective spacer formation on transistors of different classes on the same device
INTEL CORP26 citations92
US7422950B2Sep 9, 2008
Strained silicon MOS device with box layer between the source and drain regions
INTEL CORP10 citations81
US7101765B2Sep 5, 2006
Enhancing strained device performance by use of multi narrow section layout
INTEL CORP8 citations74
US7129533B2Oct 31, 2006
High concentration indium fluorine retrograde wells
INTEL CORP6 citations72
US6838329B2Jan 4, 2005
High concentration indium fluorine retrograde wells
INTEL CORP7 citations72
US7560780B2Jul 14, 2009
Active region spacer for semiconductor devices and method to form the same
INTEL CORP4 citations63
US7482670B2Jan 27, 2009
Enhancing strained device performance by use of multi narrow section layout
INTEL CORP5 citations63
CURELLO GIUSEPPE
4 patentsUS8426927B2Apr 23, 2013
Penetrating implant for forming a semiconductor device
CURELLO GIUSEPPE1 citations61
US8174060B2May 8, 2012
Selective spacer formation on transistors of different classes on the same device
CURELLO GIUSEPPE3 citations61
US8154067B2Apr 10, 2012
Selective spacer formation on transistors of different classes on the same device
CURELLO GIUSEPPE2 citations61
US8741720B2Jun 3, 2014
Penetrating implant for forming a semiconductor device
CURELLO GIUSEPPE0 citations51