Inventor
KARMAKAR SUSMITA
US11 patents
⚠️ This page may combine multiple inventors who share the name “KARMAKAR SUSMITA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SPIN MEMORY INC
6 patentsUS10699761B2Jun 30, 2020
Word line decoder memory architecture
SPIN MEMORY INC9 citations83
US11119910B2Sep 14, 2021
Heuristics for selecting subsegments for entry in and entry out operations in an error cache system with coarse and fine grain segments
SPIN MEMORY INC2 citations71
US10930332B2Feb 23, 2021
Memory array with individually trimmable sense amplifiers
SPIN MEMORY INC1 citations62
US11119936B2Sep 14, 2021
Error cache system with coarse and fine segments for power optimization
SPIN MEMORY INC0 citations61
US11048633B2Jun 29, 2021
Determining an inactive memory bank during an idle memory cycle to prevent error cache overflow
SPIN MEMORY INC0 citations61
US10803949B2Oct 13, 2020
Master slave level shift latch for word line decoder memory architecture
SPIN MEMORY INC0 citations51
INTEGRATED SILICON SOLUTION CAYMAN INC
3 patentsUS11423965B2Aug 23, 2022
Word line decoder memory architecture
INTEGRATED SILICON SOLUTION CAYMAN INC0 citations62
US11586553B2Feb 21, 2023
Error cache system with coarse and fine segments for power optimization
INTEGRATED SILICON SOLUTION CAYMAN INC0 citations61
US11580014B2Feb 14, 2023
Heuristics for selecting subsegments for entry in and entry out operations in an error cache system with coarse and fine grain segments
INTEGRATED SILICON SOLUTION CAYMAN INC0 citations61