Inventor

STEVENS KENNETH S

US12 patents

⚠️ This page may combine multiple inventors who share the name “STEVENS KENNETH S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

UNIV UTAH RES FOUND

6 patents

US9953120B2Apr 24, 2018

STEVENS KENNETH S

3 patents

US8065647B2Nov 22, 2011

Method and system for asynchronous chip design

STEVENS KENNETH S17 citations81

US8239796B2Aug 7, 2012

Method and system for synthesizing relative timing constraints on an integrated circuit design to facilitate timing verification

STEVENS KENNETH S3 citations60

US8321825B2Nov 27, 2012

Method and system for synthesizing relative timing constraints on an integrated circuit design to facilitate timing verification

STEVENS KENNETH S1 citations50

INTEL CORP

2 patents

US6314553B1Nov 6, 2001

Circuit synthesis and verification using relative timing

INTEL CORP29 citations92

US6557149B2Apr 29, 2003

Algorithm for finding vectors to stimulate all paths and arcs through an LVS gate

INTEL CORP13 citations82

SCHLUMBERGER TECHNOLOGY CORP

1 patent

US4922408AMay 1, 1990

Apparatus for multi-processor communications

SCHLUMBERGER TECHNOLOGY CORP67 citations92

STEVENS KENNETH S

UNIV UTAH RES FOUND

Relative timing characterization

Asynchronous finite state machines

Clock gating with an asynchronous wrapper cell

Cycle cutting with timing path analysis

Relative timed clock gating cell

Relative timed clock gating cell

STEVENS KENNETH S

Method and system for asynchronous chip design

Method and system for synthesizing relative timing constraints on an integrated circuit design to facilitate timing verification

Method and system for synthesizing relative timing constraints on an integrated circuit design to facilitate timing verification

INTEL CORP

Circuit synthesis and verification using relative timing

Algorithm for finding vectors to stimulate all paths and arcs through an LVS gate

SCHLUMBERGER TECHNOLOGY CORP

Apparatus for multi-processor communications