Inventor · disambiguated record
Aaron Ng
Also filed as: NG AARON · NG AARON WEN HAO
24 granted patents·3 pending applications·244 citations·filing 2008–2022
95Inventor score
Top patents by PatentIndex Score
27 records- 0197US10515135B1Data format suitable for fast massively parallel general matrix multiplication in a programmable ICXILINX INC·Filed 2017·Granted Dec 24, 2019·25 cites·20 claims
- 0297US10354733B1Software-defined memory bandwidth reduction by hierarchical stream buffering for general matrix multiplication in a programmable ICXILINX INC·Filed 2017·Granted Jul 16, 2019·40 cites·20 claims
- 0395US10460416B1Inline image preprocessing for convolution operations using a matrix multiplier on an integrated circuitXILINX INC·Filed 2017·Granted Oct 29, 2019·19 cites·17 claims
- 0494US11204747B1Re-targetable interface for data exchange between heterogeneous systems and accelerator abstraction into software instructionsXILINX INC·Filed 2017·Granted Dec 21, 2021·19 cites·20 claims
- 0594US10192016B2Neural network based physical synthesis for circuit designsXILINX INC·Filed 2017·Granted Jan 29, 2019·49 cites·20 claims
- 0690US10943039B1Software-driven design optimization for fixed-point multiply-accumulate circuitryXILINX INC·Filed 2017·Granted Mar 9, 2021·11 cites·20 claims
- 0790US10678509B1Software-driven design optimization for mapping between floating-point and fixed-point multiply accumulatorsXILINX INC·Filed 2018·Granted Jun 9, 2020·11 cites·20 claims
- 0888US11222256B2Neural network processing system having multiple processors and a neural network acceleratorXILINX INC·Filed 2017·Granted Jan 11, 2022·8 cites·15 claims
- 0988US9646126B1Post-routing structural netlist optimization for circuit designsXILINX INC·Filed 2015·Granted May 9, 2017·7 cites·20 claims
- 1087US11036827B1Software-defined buffer/transposer for general matrix multiplication in a programmable ICXILINX INC·Filed 2017·Granted Jun 15, 2021·7 cites·20 claims
- 1187US10936311B1Sparse matrix processing circuitryXILINX INC·Filed 2019·Granted Mar 2, 2021·8 cites·20 claims
- 1287US9965581B1Fanout optimization to facilitate timing improvement in circuit designsXILINX INC·Filed 2015·Granted May 8, 2018·6 cites·20 claims
- 1386US10366201B1Timing closure of circuit designs for integrated circuitsXILINX INC·Filed 2017·Granted Jul 30, 2019·5 cites·20 claims
- 1485US9836568B1Programmable integrated circuit design flow using timing-driven pipeline analysisXILINX INC·Filed 2016·Granted Dec 5, 2017·6 cites·20 claims
- 1583US11568218B2Neural network processing system having host controlled kernel accleratorsXILINX INC·Filed 2017·Granted Jan 31, 2023·5 cites·20 claims
- 1681US10984500B1Inline image preprocessing for convolution operations using a matrix multiplier on an integrated circuitXILINX INC·Filed 2019·Granted Apr 20, 2021·3 cites·20 claims
- 1780US11429848B2Host-directed multi-layer neural network processing via per-layer work requestsXILINX INC·Filed 2017·Granted Aug 30, 2022·4 cites·14 claims
- 1876US11620490B2Multi-layer neural network processing by a neural network accelerator using host communicated merged weights and a package of per-layer instructionsXILINX INC·Filed 2017·Granted Apr 4, 2023·3 cites·14 claims
- 1976US11386644B2Image preprocessing for generalized image processingXILINX INC·Filed 2017·Granted Jul 12, 2022·2 cites·17 claims
- 2073US7840919B1Resource mapping of functional areas on an integrated circuitXILINX INC·Filed 2008·Granted Nov 23, 2010·6 cites·20 claims
- 2169US12412109B2Machine learning deployment platformXILINX INC·Filed 2022·Granted Sep 9, 2025·0 cites·19 claims
- 2262US12079158B2Reconfigurable neural engine with extensible instruction set architectureXILINX INC·Filed 2022·Granted Sep 3, 2024·0 cites·20 claims
- 2356US2024069511A1Instruction generation and programming model for a data processing array and microcontrollerXILINX INC·Filed 2022·Application pending·0 cites
- 2453US2023297824A1Programmable non-linear activation engine for neural network accelerationXILINX INC·Filed 2022·Application pending·0 cites
- 2552US12248786B2Instruction set architecture for data processing array controlXILINX INC·Filed 2022·Granted Mar 11, 2025·0 cites·20 claims
- 2647US11694066B2Machine learning runtime library for neural network accelerationXILINX INC·Filed 2017·Granted Jul 4, 2023·0 cites·20 claims
- 2747US2023236791A1Media content sequencingSPOTIFY AB·Filed 2022·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →