Inventor · disambiguated record
Adesh Garg
Also filed as: GARG ADESH
20 granted patents·1 pending application·88 citations·filing 2008–2024
93Inventor score
Top patents by PatentIndex Score
21 records- 0194US10069508B1Multiplexer circuit for a digital to analog converterAVAGO TECHNOLOGIES GENERAL IP·Filed 2017·Granted Sep 4, 2018·15 cites·20 claims
- 0294US9685969B1Time-interleaved high-speed digital-to-analog converter (DAC) architecture with spur calibrationAVAGO TECHNOLOGIES GENERAL IP·Filed 2016·Granted Jun 20, 2017·19 cites·20 claims
- 0387US9325316B1Low-power high swing CML driver with independent common-mode and swing controlBROADCOM CORP·Filed 2015·Granted Apr 26, 2016·9 cites·20 claims
- 0487US8791742B2Distributed resonate clock driverBROADCOM CORP·Filed 2012·Granted Jul 29, 2014·10 cites·20 claims
- 0584US7541961B1High speed, low power all CMOS thermometer-to-binary demultiplexerBROADCOM CORP·Filed 2008·Granted Jun 2, 2009·11 cites·20 claims
- 0682US10277210B1Clock skew suppression for time-interleaved clocksAVAGO TECH INT SALES PTE LID·Filed 2017·Granted Apr 30, 2019·5 cites·20 claims
- 0781US11569830B1Transition aware dynamic element matchingAVAGO TECH INT SALES PTE LID·Filed 2022·Granted Jan 31, 2023·1 cites·20 claims
- 0880US10014877B1Multi-segmented all logic DACAVAGO TECHNOLOGIES GENERAL IP·Filed 2017·Granted Jul 3, 2018·5 cites·17 claims
- 0980US9100167B2Multilane SERDES clock and data skew alignment for multi-standard supportBROADCOM CORP·Filed 2012·Granted Aug 4, 2015·5 cites·20 claims
- 1074US10014846B2Increasing output amplitude of a voltage-mode driver in a low supply voltage technologyBROADCOM CORP·Filed 2014·Granted Jul 3, 2018·3 cites·20 claims
- 1173US10033520B2Multilane serdes clock and data skew alignment for multi-standard supportAVAGO TECHNOLOGIES GENERAL IP·Filed 2015·Granted Jul 24, 2018·2 cites·20 claims
- 1272US2025038755A1Digital pre-distortion method and apparatus for a digital to analog converterAVAGO TECH INT SALES PTE LID·Filed 2024·Application pending·0 cites
- 1369US12119835B2Digital pre-distortion method and apparatus for a digital to analog converterAVAGO TECH INT SALES PTE LID·Filed 2022·Granted Oct 15, 2024·0 cites·21 claims
- 1468US7973681B2High speed, low power non-return-to-zero/return-to-zero output driverBROADCOM CORP·Filed 2009·Granted Jul 5, 2011·3 cites·18 claims
- 1566US12212342B2Systems for and methods of fractional frequency divisionAVAGO TECH INT SALES PTE LID·Filed 2023·Granted Jan 28, 2025·0 cites·20 claims
- 1660US12199608B2System and apparatus for on-substrate circuit configured to operate as transformerAVAGO TECH INT SALES PTE LID·Filed 2022·Granted Jan 14, 2025·0 cites·19 claims
- 1759US12375043B2Aging-averse bandwidth extension apparatusAVAGO TECH INT SALES PTE LID·Filed 2022·Granted Jul 29, 2025·0 cites·17 claims
- 1858US11683048B2Systems for and methods of fractional frequency divisionAVAGO TECH INT SALES PTE LID·Filed 2021·Granted Jun 20, 2023·0 cites·20 claims
- 1956US12407356B2System and method for transition aware binary switching for digital-to-analog converters (DACs)AVAGO TECH INT SALES PTE LID·Filed 2023·Granted Sep 2, 2025·0 cites·20 claims
- 2043US7773021B2High speed, low power all CMOS thermometer-to-binary demultiplexerBROADCOM CORP·Filed 2009·Granted Aug 10, 2010·0 cites·20 claims
- 2132US8106807B2Bubble correction in a flash analog-to-digital converterKHANPOUR MEHDI·Filed 2010·Granted Jan 31, 2012·0 cites·24 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →