Inventor · disambiguated record
Adam J. Muff
Also filed as: MUFF ADAM · MUFF ADAM J · MUFF ADAM JAMES
115 granted patents·8 pending applications·1,109 citations·filing 2005–2021
99Inventor score
Top patents by PatentIndex Score
123 records- 0199US8310497B2Anisotropic texture filtering with texture data prefetchingCOMPARAN MIGUEL·Filed 2012·Granted Nov 13, 2012·133 cites·24 claims
- 0299US8217953B2Anisotropic texture filtering with texture data prefetchingCOMPARAN MIGUEL·Filed 2008·Granted Jul 10, 2012·135 cites·2 claims
- 0397US9978118B1No miss cache structure for real-time image transformations with data compressionMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted May 22, 2018·55 cites·24 claims
- 0496US9971713B2Multi-petascale highly efficient parallel supercomputerGLOBALFOUNDRIES INC·Filed 2015·Granted May 15, 2018·30 cites·14 claims
- 0596US9081501B2Multi-petascale highly efficient parallel supercomputerASAAD SAMEH·Filed 2011·Granted Jul 14, 2015·115 cites·41 claims
- 0696US7809925B2Processing unit incorporating vectorizable execution unitIBM·Filed 2007·Granted Oct 5, 2010·52 cites·21 claims
- 0795US8356162B2Execution unit with data dependent conditional write instructionsIBM·Filed 2008·Granted Jan 15, 2013·45 cites·20 claims
- 0893US9256428B2Load latency speculation in an out-of-order computer processorIBM·Filed 2013·Granted Feb 9, 2016·20 cites·13 claims
- 0993US7814303B2Execution of a sequence of vector instructions preceded by a swizzle sequence instruction specifying data element shuffle orders respectivelyIBM·Filed 2008·Granted Oct 12, 2010·34 cites·25 claims
- 1092US9582277B2Indirect instruction predicationIBM·Filed 2016·Granted Feb 28, 2017·6 cites·5 claims
- 1192US9292290B2Instruction set architecture with opcode lookup using memory attributeIBM·Filed 2013·Granted Mar 22, 2016·13 cites·11 claims
- 1292US9147078B2Instruction set architecture with secure clear instructions for protecting processing unit architected state informationIBM·Filed 2013·Granted Sep 29, 2015·15 cites·12 claims
- 1391US8751830B2Memory address translation-based data encryption/compressionMUFF ADAM J·Filed 2012·Granted Jun 10, 2014·16 cites·22 claims
- 1491US8082420B2Method and apparatus for executing instructionsCOMPARAN MIGUEL·Filed 2007·Granted Dec 20, 2011·38 cites·14 claims
- 1588US9710274B2Extensible execution unit interface architecture with multiple decode logic and multiple execution unitsIBM·Filed 2016·Granted Jul 18, 2017·4 cites·16 claims
- 1688US9619234B2Indirect instruction predicationIBM·Filed 2016·Granted Apr 11, 2017·4 cites·20 claims
- 1787US10042417B2Branch prediction with power usage prediction and controlIBM·Filed 2016·Granted Aug 7, 2018·4 cites·19 claims
- 1887US9183399B2Instruction set architecture with secure clear instructions for protecting processing unit architected state informationIBM·Filed 2013·Granted Nov 10, 2015·8 cites·24 claims
- 1987US7783860B2Load misaligned vector with permute and mask insertIBM·Filed 2007·Granted Aug 24, 2010·17 cites·13 claims
- 2086US10067556B2Branch prediction with power usage prediction and controlIBM·Filed 2015·Granted Sep 4, 2018·4 cites·19 claims
- 2186US9652239B2Instruction set architecture with opcode lookup using memory attributeIBM·Filed 2016·Granted May 16, 2017·3 cites·12 claims
- 2286US9652238B2Instruction set architecture with opcode lookup using memory attributeIBM·Filed 2016·Granted May 16, 2017·3 cites·20 claims
- 2386US9594557B2Floating point execution unit for calculating packed sum of absolute differencesIBM·Filed 2016·Granted Mar 14, 2017·3 cites·18 claims
- 2486US9594562B2Extensible execution unit interface architecture with multiple decode logic and multiple execution unitsIBM·Filed 2016·Granted Mar 14, 2017·3 cites·20 claims
- 2586US9594556B2Floating point execution unit for calculating packed sum of absolute differencesIBM·Filed 2016·Granted Mar 14, 2017·3 cites·20 claims
- 2686US9542184B2Local instruction loop buffer utilizing execution unit register fileIBM·Filed 2016·Granted Jan 10, 2017·3 cites·15 claims
- 2786US9501279B2Local instruction loop buffer utilizing execution unit register fileIBM·Filed 2016·Granted Nov 22, 2016·3 cites·9 claims
- 2886US9317291B2Local instruction loop buffer utilizing execution unit register fileIBM·Filed 2013·Granted Apr 19, 2016·6 cites·8 claims
- 2986US8930432B2Floating point execution unit with fixed point functionalityHICKEY MARK J·Filed 2011·Granted Jan 6, 2015·10 cites·22 claims
- 3086US8412980B2Fault tolerant stability critical execution checking using redundant execution pipelinesHICKEY MARK J·Filed 2010·Granted Apr 2, 2013·9 cites·19 claims
- 3185US9405536B2Floating point execution unit for calculating packed sum of absolute differencesIBM·Filed 2015·Granted Aug 2, 2016·3 cites·4 claims
- 3285US8707094B2Fault tolerant stability critical execution checking using redundant execution pipelinesIBM·Filed 2013·Granted Apr 22, 2014·7 cites·20 claims
- 3385US7890699B2Processing unit incorporating L1 cache bypassIBM·Filed 2008·Granted Feb 15, 2011·14 cites·24 claims
- 3484US10672368B2No miss cache structure for real-time image transformations with multiple LSR processing enginesMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2019·Granted Jun 2, 2020·3 cites·19 claims
- 3584US9329870B2Extensible execution unit interface architecture with multiple decode logic and multiple execution unitsIBM·Filed 2013·Granted May 3, 2016·5 cites·10 claims
- 3684US9317294B2Concurrent multiple instruction issue of non-pipelined instructions using non-pipelined operation resources in another processing coreIBM·Filed 2012·Granted Apr 19, 2016·6 cites·22 claims
- 3784US9032191B2Virtualization support for branch prediction logic enable / disable at hypervisor and guest operating system levelsMUFF ADAM J·Filed 2012·Granted May 12, 2015·8 cites·25 claims
- 3884US8954755B2Memory address translation-based data encryption with integrated encryption engineMUFF ADAM J·Filed 2012·Granted Feb 10, 2015·7 cites·25 claims
- 3984US8332452B2Single precision vector dot product with “word” vector write maskMEJDRICH ERIC OLIVER·Filed 2006·Granted Dec 11, 2012·13 cites·20 claims
- 4084US7926009B2Dual independent and shared resource vector execution units with shared register fileIBM·Filed 2007·Granted Apr 12, 2011·11 cites·6 claims
- 4183US10242654B2No miss cache structure for real-time image transformationsMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted Mar 26, 2019·3 cites·19 claims
- 4283US9507599B2Instruction set architecture with extensible register addressingGLOBALFOUNDRIES INC·Filed 2013·Granted Nov 29, 2016·6 cites·23 claims
- 4382US9189051B2Power reduction by minimizing bit transitions in the hamming distances of encoded communicationsIBM·Filed 2012·Granted Nov 17, 2015·5 cites·8 claims
- 4482US9170954B2Translation management instructions for updating address translation data structures in remote processing nodesIBM·Filed 2012·Granted Oct 27, 2015·5 cites·17 claims
- 4582US7234017B2Computer system architecture for a processor connected to a high speed bus transceiverIBM·Filed 2005·Granted Jun 19, 2007·14 cites·32 claims
- 4681US10410349B2Selective application of reprojection processing on layer sub-regions for optimizing late stage reprojection powerMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted Sep 10, 2019·3 cites·21 claims
- 4781US10255891B2No miss cache structure for real-time image transformations with multiple LSR processing enginesMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted Apr 9, 2019·3 cites·21 claims
- 4881US9223753B2Dynamic range adjusting floating point execution unitIBM·Filed 2013·Granted Dec 29, 2015·5 cites·21 claims
- 4981US8935694B2System and method for selectively saving and restoring state of branch prediction logic through separate hypervisor-mode and guest-mode and/or user-mode instructionsMUFF ADAM J·Filed 2012·Granted Jan 13, 2015·6 cites·23 claims
- 5080US9251116B2Direct interthread communication dataport pack/unpack and load/saveMUFF ADAM J·Filed 2011·Granted Feb 2, 2016·6 cites·23 claims
Showing the top 50 of 123 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →