Inventor · disambiguated record
Aditya Navale
Also filed as: NAVALE ADITYA
80 granted patents·11 pending applications·411 citations·filing 2001–2024
99Inventor score
Top patents by PatentIndex Score
91 records- 0194US9323684B2Dynamic cache and memory allocation for memory subsystemsINTEL CORP·Filed 2014·Granted Apr 26, 2016·22 cites·25 claims
- 0292US10861126B1Asynchronous execution mechanismINTEL CORP·Filed 2019·Granted Dec 8, 2020·5 cites·20 claims
- 0392US10282808B2Hierarchical lossless compression and null data supportINTEL CORP·Filed 2016·Granted May 7, 2019·9 cites·19 claims
- 0492US8477145B2Memory address re-mapping of graphics dataVEMBU BALAJI·Filed 2012·Granted Jul 2, 2013·16 cites·32 claims
- 0591US10997086B1Systems and methods in a graphics environment for providing shared virtual memory addressing support for a host systemINTEL CORP·Filed 2020·Granted May 4, 2021·3 cites·20 claims
- 0690US7868897B2Apparatus and method for memory address re-mapping of graphics dataINTEL CORP·Filed 2006·Granted Jan 11, 2011·17 cites·18 claims
- 0790US6971034B2Power/performance optimized memory controller considering processor power statesINTEL CORP·Filed 2003·Granted Nov 29, 2005·68 cites·20 claims
- 0889US12293462B2Tile sequencing mechanismINTEL CORP·Filed 2024·Granted May 6, 2025·1 cites·20 claims
- 0989US7149909B2Power management for an integrated graphics deviceINTEL CORP·Filed 2002·Granted Dec 12, 2006·71 cites·18 claims
- 1088US7581129B2Dynamic power control for reduced voltage level of graphics controller component of memory controller based on its degree of idlenessINTEL CORP·Filed 2007·Granted Aug 25, 2009·11 cites·19 claims
- 1188US7222253B2Dynamic power control for reducing voltage level of graphics controller component of memory controller based on its degree of idlenessINTEL CORP·Filed 2004·Granted May 22, 2007·29 cites·25 claims
- 1287US9996386B2Mid-thread pre-emption with software assisted context switchINTEL CORP·Filed 2014·Granted Jun 12, 2018·10 cites·25 claims
- 1387US8301927B2Dynamic control of reduced voltage state of graphics controller component of memory controllerSAMSON ERIC C·Filed 2011·Granted Oct 30, 2012·6 cites·17 claims
- 1484US8510585B2Dynamic control of reduced voltage state of graphics controller component of memory controllerSAMSON ERIC C·Filed 2012·Granted Aug 13, 2013·4 cites·22 claims
- 1584US8037334B2Dynamic power control for reduced voltage level of graphics controller component of memory controller based on its degree of idlenessINTEL CORP·Filed 2009·Granted Oct 11, 2011·7 cites·19 claims
- 1682US9626735B2Page management approach to fully utilize hardware caches for tiled renderingINTEL CORP·Filed 2013·Granted Apr 18, 2017·6 cites·24 claims
- 1782US9213395B2Dynamic control of reduced voltage state of graphics controller component of memory controllerINTEL CORP·Filed 2014·Granted Dec 15, 2015·3 cites·13 claims
- 1882US8850254B2Dynamic control of reduced voltage state of graphics controller component of memory controllerINTEL CORP·Filed 2013·Granted Sep 30, 2014·3 cites·17 claims
- 1981US11157431B2System, apparatus and method for multi-die distributed memory mapped input/output supportINTEL CORP·Filed 2019·Granted Oct 26, 2021·3 cites·20 claims
- 2080US9928564B2Efficient hardware mechanism to ensure shared resource data coherency across draw callsINTEL CORP·Filed 2014·Granted Mar 27, 2018·3 cites·24 claims
- 2180US9396032B2Priority based context preemptionINTEL CORP·Filed 2014·Granted Jul 19, 2016·5 cites·21 claims
- 2280US8314806B2Low power display modeSAMSON ERIC·Filed 2006·Granted Nov 20, 2012·5 cites·14 claims
- 2379US10191759B2Apparatus and method for scheduling graphics processing unit workloads from virtual machinesINTEL CORP·Filed 2013·Granted Jan 29, 2019·5 cites·16 claims
- 2479US9916257B2Method and apparatus for TLB shoot-down in a heterogeneous computing system supporting shared virtual memorySANKARAN RAJESH M·Filed 2011·Granted Mar 13, 2018·6 cites·20 claims
- 2578US10078879B2Process synchronization between engines using data in a memory locationINTEL CORP·Filed 2015·Granted Sep 18, 2018·2 cites·20 claims
- 2678US9304813B2CPU independent graphics scheduler for performing scheduling operations for graphics hardwareVEMBU BALAJI·Filed 2012·Granted Apr 5, 2016·5 cites·15 claims
- 2777US9589159B2Creating secure communication channels between processing elementsVEMBU BALAJI·Filed 2009·Granted Mar 7, 2017·7 cites·18 claims
- 2874US11704181B2Apparatus and method for scalable error detection and reportingINTEL CORP·Filed 2022·Granted Jul 18, 2023·0 cites·20 claims
- 2974US9075741B2Dynamic error handling using parity and redundant rowsKOKER ALTUG·Filed 2011·Granted Jul 7, 2015·4 cites·4 claims
- 3073US7343502B2Method and apparatus for dynamic DLL powerdown and memory self-refreshINTEL CORP·Filed 2004·Granted Mar 11, 2008·17 cites·27 claims
- 3173US2023039853A1Workload scheduling and distribution on a distributed graphics deviceINTEL CORP·Filed 2022·Application pending·0 cites
- 3272US10997686B2Workload scheduling and distribution on a distributed graphics deviceINTEL CORP·Filed 2019·Granted May 4, 2021·1 cites·20 claims
- 3372US9436972B2System coherency in a distributed graphics processor hierarchyINTEL CORP·Filed 2014·Granted Sep 6, 2016·3 cites·18 claims
- 3470US11481864B2Workload scheduling and distribution on a distributed graphics deviceINTEL CORP·Filed 2021·Granted Oct 25, 2022·0 cites·20 claims
- 3570US7353349B2Method and apparatus for reordering memory requests for page coherencyINTEL CORP·Filed 2005·Granted Apr 1, 2008·4 cites·6 claims
- 3670US6842807B2Method and apparatus for deprioritizing a high priority clientINTEL CORP·Filed 2002·Granted Jan 11, 2005·10 cites·10 claims
- 3769US11900539B2Tile sequencing mechanismINTEL CORP·Filed 2022·Granted Feb 13, 2024·0 cites·20 claims
- 3869US11385952B2Apparatus and method for scalable error detection and reportingINTEL CORP·Filed 2021·Granted Jul 12, 2022·0 cites·20 claims
- 3967US11556480B2Systems and methods in a graphics environment for providing shared virtual memory addressing support for a host systemINTEL CORP·Filed 2021·Granted Jan 17, 2023·0 cites·20 claims
- 4067US11494867B2Asynchronous execution mechanismINTEL CORP·Filed 2020·Granted Nov 8, 2022·0 cites·20 claims
- 4166US11250627B2Tile sequencing mechanismINTEL CORP·Filed 2020·Granted Feb 15, 2022·0 cites·20 claims
- 4266US8154555B2Memory address re-mapping of graphics dataVEMBU BALAJI·Filed 2010·Granted Apr 10, 2012·1 cites·24 claims
- 4364US6871119B2Filter based throttlingINTEL CORP·Filed 2003·Granted Mar 22, 2005·14 cites·40 claims
- 4463US12499503B2Multi-render partitioningINTEL CORP·Filed 2022·Granted Dec 16, 2025·0 cites·20 claims
- 4563US10922161B2Apparatus and method for scalable error detection and reportingINTEL CORP·Filed 2018·Granted Feb 16, 2021·0 cites·27 claims
- 4663US9633230B2Hardware assist for privilege access violation checksINTEL CORP·Filed 2012·Granted Apr 25, 2017·1 cites·23 claims
- 4761US9383813B2Dynamic control of reduced voltage state of graphics controller component of memory controllerSAMSON ERIC C·Filed 2015·Granted Jul 5, 2016·0 cites·9 claims
- 4861US9064437B2Memory based semaphoresNALLURI HEMA CHAND·Filed 2012·Granted Jun 23, 2015·1 cites·30 claims
- 4961US6898679B2Method and apparatus for reordering memory requests for page coherencyINTEL CORP·Filed 2001·Granted May 24, 2005·7 cites·24 claims
- 5060US11288191B1Range based flushing mechanismINTEL CORP·Filed 2020·Granted Mar 29, 2022·0 cites·17 claims
Showing the top 50 of 91 patent records by PatentIndex Score.
Join the waitlist — get patent alerts
Get an alert when Aditya Navale files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →