Inventor · disambiguated record
Adam R. Talcott
Also filed as: TALCOTT ADAM · TALCOTT ADAM R
26 granted patents·4 pending applications·808 citations·filing 1996–2007
97Inventor score
Technology areasG06F
Top patents by PatentIndex Score
30 records- 0197US8762951B1Apparatus and method for profiling system events in a fine grain multi-threaded multi-core processorKOSCHE NICOLAI·Filed 2007·Granted Jun 24, 2014·203 cites·14 claims
- 0287US7827383B2Efficient on-chip accelerator interfaces to reduce software overheadORACLE AMERICA INC·Filed 2007·Granted Nov 2, 2010·18 cites·18 claims
- 0384US6615343B1Mechanism for delivering precise exceptions in an out-of-order processor with speculative executionSUN MICROSYSTEMS INC·Filed 2000·Granted Sep 2, 2003·44 cites·11 claims
- 0474US6330662B1Apparatus including a fetch unit to include branch history information to increase performance of multi-cylce pipelined branch prediction structuresSUN MICROSYSTEMS INC·Filed 1999·Granted Dec 11, 2001·66 cites·8 claims
- 0574US5854761ACache memory array which stores two-way set associative dataSUN MICROSYSTEMS INC·Filed 1997·Granted Dec 29, 1998·67 cites·20 claims
- 0673US6934830B2Method and apparatus for reducing register file access times in pipelined processorsSUN MICROSYSTEMS INC·Filed 2002·Granted Aug 23, 2005·19 cites·15 claims
- 0772US7809895B2Low overhead access to shared on-chip hardware accelerator with memory-based interfacesORACLE AMERICA INC·Filed 2007·Granted Oct 5, 2010·7 cites·20 claims
- 0871US6272623B1Methods and apparatus for branch prediction using hybrid history with index sharingSUN MICROSYSTEMS INC·Filed 1999·Granted Aug 7, 2001·49 cites·11 claims
- 0968US6134654ABi-level branch target prediction scheme with fetch address predictionSUN MICROSYSTEMS INC·Filed 1998·Granted Oct 17, 2000·53 cites·22 claims
- 1065US7707554B1Associating data source information with runtime eventsORACLE AMERICA INC·Filed 2004·Granted Apr 27, 2010·10 cites·56 claims
- 1165US6510511B2Methods and apparatus for branch prediction using hybrid history with index sharingSUN MICROSYSTEMS INC·Filed 2001·Granted Jan 21, 2003·9 cites·12 claims
- 1264US6738897B1Incorporating local branch history when predicting multiple conditional branch outcomesSUN MICROSYSTEMS INC·Filed 2000·Granted May 18, 2004·10 cites·24 claims
- 1363US7096390B2Sampling mechanism including instruction filteringSUN MICROSYSTEMS INC·Filed 2002·Granted Aug 22, 2006·9 cites·5 claims
- 1462US5935238ASelection from multiple fetch addresses generated concurrently including predicted and actual target by control-flow instructions in current and previous instruction bundlesSUN MICROSYSTEMS INC·Filed 1997·Granted Aug 10, 1999·42 cites·14 claims
- 1560US5964869AInstruction fetch mechanism with simultaneous prediction of control-flow instructionsSUN MICROSYSTEMS INC·Filed 1997·Granted Oct 12, 1999·37 cites·18 claims
- 1659US6256729B1Method and apparatus for resolving multiple branchesSUN MICROSYSTEMS INC·Filed 1998·Granted Jul 3, 2001·35 cites·20 claims
- 1758US5875325AProcessor having reduced branch history table size through global branch history compression and method of branch prediction utilizing compressed global branch historyIBM·Filed 1996·Granted Feb 23, 1999·33 cites·16 claims
- 1855US6948055B1Accuracy of multiple branch prediction schemesSUN MICROSYSTEMS INC·Filed 2000·Granted Sep 20, 2005·4 cites·11 claims
- 1950US8826241B2Instruction sampling in a multi-threaded processorWOLCZKO MARIO I·Filed 2004·Granted Sep 2, 2014·2 cites·22 claims
- 2049US5938761AMethod and apparatus for branch target predictionSUN MICROSYSTEMS INC·Filed 1997·Granted Aug 17, 1999·21 cites·26 claims
- 2146US5796998AApparatus and method for performing branch target address calculation and branch prediciton in parallel in an information handling systemIBM·Filed 1996·Granted Aug 18, 1998·18 cites·22 claims
- 2245US6115810ABi-level branch target prediction scheme with mux select predictionSUN MICROSYSTEMS INC·Filed 1998·Granted Sep 5, 2000·17 cites·25 claims
- 2345US2005188186A1Obtaining execution path information in an instruction sampling systemFiled 2004·Application pending·0 cites
- 2445US2005183065A1Performance counters in a multi-threaded processorFiled 2004·Application pending·0 cites
- 2545US2005198555A1Incorporating instruction reissue in an instruction sampling mechanismFiled 2004·Application pending·0 cites
- 2644US6256709B1Method for storing data in two-way set associative odd and even banks of a cache memorySUN MICROSYSTEMS INC·Filed 1997·Granted Jul 3, 2001·16 cites·17 claims
- 2739US6289441B1Method and apparatus for performing multiple branch predictions per cycleSUN MICROSYSTEMS INC·Filed 1998·Granted Sep 11, 2001·11 cites·19 claims
- 2835US2008016325A1Using windowed register file to checkpoint register stateLAUDON JAMES P·Filed 2006·Application pending·0 cites
- 2934US5857098ABranch instruction prediction apparatusSAMSUNG ELECTRONICS CO LTD·Filed 1997·Granted Jan 5, 1999·6 cites·15 claims
- 3031US5941985ABranch instruction prediction methodSUN MICROSYSTEMS INC·Filed 1997·Granted Aug 24, 1999·2 cites·19 claims
Join the waitlist — get patent alerts
Get an alert when Adam R. Talcott files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →