Inventor · disambiguated record
Allan Robert Bertolet
Also filed as: BERTOLET ALLAN · BERTOLET ALLAN R · BERTOLET ALLAN ROBERT
10 granted patents·654 citations·filing 1993–1998
92Inventor score
Files withIBM10
Top patents by PatentIndex Score
10 records- 0193US5671432AProgrammable array I/O-routing resourceIBM·Filed 1995·Granted Sep 23, 1997·116 cites·38 claims
- 0291US6204074B1Chip design process for wire bond and flip-chip packageIBM·Filed 1997·Granted Mar 20, 2001·150 cites·20 claims
- 0390US6025744AGlitch free delay line multiplexing techniqueIBM·Filed 1998·Granted Feb 15, 2000·76 cites·16 claims
- 0483US5910733AMethod and system for layout and schematic generation for heterogeneous arraysIBM·Filed 1997·Granted Jun 8, 1999·95 cites·9 claims
- 0583US5844317AConsolidated chip design for wire bond and flip-chip package technologiesIBM·Filed 1996·Granted Dec 1, 1998·106 cites·17 claims
- 0683US5646546AProgrammable logic cell having configurable gates and multiplexersIBM·Filed 1995·Granted Jul 8, 1997·40 cites·38 claims
- 0777US5781032AProgrammable inverter circuit used in a programmable logic cellIBM·Filed 1996·Granted Jul 14, 1998·36 cites·4 claims
- 0863US5748009AProgrammable logic cellIBM·Filed 1996·Granted May 5, 1998·16 cites·15 claims
- 0948US5734582AMethod and system for layout and schematic generation for heterogeneous arraysIBM·Filed 1995·Granted Mar 31, 1998·18 cites·32 claims
- 1030US5389836ABranch isolation circuit for cascode voltage switch logicIBM·Filed 1993·Granted Feb 14, 1995·1 cites·16 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →