Inventor · disambiguated record
Alexander V. Ermolovich
Also filed as: ERMOLOVICH ALEXANDER V
5 granted patents·2 pending applications·3 citations·filing 2003–2016
63Inventor score
Technology areasG06F
Top patents by PatentIndex Score
7 records- 0148US7069412B2Method of using a plurality of virtual memory spaces for providing efficient binary compatibility between a plurality of source architectures and a single target architectureELBRUS INTERNAT·Filed 2003·Granted Jun 27, 2006·3 cites·3 claims
- 0246US10235171B2Method and apparatus to efficiently handle allocation of memory ordering buffers in a multi-strand out-of-order loop processorINTEL CORP·Filed 2016·Granted Mar 19, 2019·0 cites·20 claims
- 0344US10241801B2Method and apparatus to create register windows for parallel iterations to achieve high performance in HW-SW codesigned loop acceleratorINTEL CORP·Filed 2016·Granted Mar 26, 2019·0 cites·22 claims
- 0443US10241794B2Apparatus and methods to support counted loop exits in a multi-strand loop processorINTEL CORP·Filed 2016·Granted Mar 26, 2019·0 cites·20 claims
- 0543US10241789B2Method to do control speculation on loads in a high performance strand-based loop acceleratorINTEL CORP·Filed 2016·Granted Mar 26, 2019·0 cites·20 claims
- 0636US2018181398A1Apparatus and methods of decomposing loops to improve performance and power efficiencyINTEL CORP·Filed 2016·Application pending·0 cites
- 0735US2017090929A1Hardware-assisted software verification and secure executionMCAFEE INC·Filed 2015·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Alexander V. Ermolovich files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →