Inventor · disambiguated record
Albert Jan Huitsing
Also filed as: HUITSING ALBERT JAN
4 granted patents·1 pending application·5 citations·filing 2003–2014
62Inventor score
Top patents by PatentIndex Score
5 records- 0164US9153958B2Bias-insensitive trigger circuit for bigFET ESD supply protectionNXP BV·Filed 2013·Granted Oct 6, 2015·2 cites·18 claims
- 0255US8654488B2Secondary ESD circuitHUITSING ALBERT JAN·Filed 2010·Granted Feb 18, 2014·2 cites·15 claims
- 0344US9653447B2Local interconnect layer enhanced ESD in a bipolar-CMOS-DMOSNXP BV·Filed 2014·Granted May 16, 2017·0 cites·22 claims
- 0431US7265574B2Fail-safe method and circuitNXP BV·Filed 2003·Granted Sep 4, 2007·1 cites·11 claims
- 0530US2009009217A1Transformation of an input signal into a logical output voltage level with a hysteresis behaviorNXP BV·Filed 2007·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →