Inventor · disambiguated record
Alexander S. Podkolzin
Also filed as: PODKOLZIN ALEXANDER S
34 granted patents·2,726 citations·filing 1994–2003
98Inventor score
Top patents by PatentIndex Score
34 records- 0198US5777360AHexagonal field programmable gate array architectureLSI LOGIC CORP·Filed 1995·Granted Jul 7, 1998·338 cites·49 claims
- 0297US5822214ACAD for hexagonal architectureLSI LOGIC CORP·Filed 1995·Granted Oct 13, 1998·297 cites·5 claims
- 0396US6407434B1Hexagonal architectureLSI LOGIC CORP·Filed 1995·Granted Jun 18, 2002·245 cites·4 claims
- 0496US5650653AMicroelectronic integrated circuit including triangular CMOS "nand" gate deviceLSI LOGIC CORP·Filed 1995·Granted Jul 22, 1997·175 cites·47 claims
- 0594US5811863ATransistors having dynamically adjustable characteristicsLSI LOGIC CORP·Filed 1995·Granted Sep 22, 1998·202 cites·47 claims
- 0693US5973376AArchitecture having diamond shaped or parallelogram shaped cellsLSI LOGIC CORP·Filed 1995·Granted Oct 26, 1999·157 cites·9 claims
- 0793US5742086AHexagonal DRAM arrayLSI LOGIC CORP·Filed 1995·Granted Apr 21, 1998·162 cites·40 claims
- 0891US5889329ATri-directional interconnect architecture for SRAMLSI LOGIC CORP·Filed 1995·Granted Mar 30, 1999·135 cites·65 claims
- 0991US5578840AMicroelectronic integrated circuit structure and method using three directional interconnect routing based on hexagonal geometryLIS LOGIC CORP·Filed 1994·Granted Nov 26, 1996·188 cites·9 claims
- 1088US5872380AHexagonal sense cell architectureLSI LOGIC CORP·Filed 1995·Granted Feb 16, 1999·106 cites·27 claims
- 1185US6564361B1Method and apparatus for timing driven resynthesisLSI LOGIC CORP·Filed 2000·Granted May 13, 2003·44 cites·4 claims
- 1281US6543032B1Method and apparatus for local resynthesis of logic trees with multiple cost functionsLSI LOGIC CORP·Filed 2000·Granted Apr 1, 2003·33 cites·17 claims
- 1380US6134702APhysical design automation system and process for designing integrated circuit chips using multiway partitioning with constraintsLSI LOGIC CORP·Filed 1997·Granted Oct 17, 2000·90 cites·22 claims
- 1478US5789770AHexagonal architecture with triangular shaped cellsLSI LOGIC CORP·Filed 1995·Granted Aug 4, 1998·53 cites·41 claims
- 1577US5808330APolydirectional non-orthoginal three layer interconnect architectureLSI LOGIC CORP·Filed 1995·Granted Sep 15, 1998·54 cites·12 claims
- 1675US6681373B1Method and apparatus for dynamic buffer and inverter tree optimizationLSI LOGIC CORP·Filed 2000·Granted Jan 20, 2004·22 cites·26 claims
- 1773US5661663APhysical design automation system and method using hierarchical clusterization and placement improvement based on complete re-placement of cell clustersLSI LOGIC CORP·Filed 1995·Granted Aug 26, 1997·66 cites·41 claims
- 1872US5699265APhysical design automation system and process for designing integrated circuit chips using multiway partitioning with constraintsLSI LOGIC CORP·Filed 1995·Granted Dec 16, 1997·63 cites·22 claims
- 1971US6532582B1Method and apparatus for optimal critical netlist area selectionLSI LOGIC CORP·Filed 2000·Granted Mar 11, 2003·17 cites·27 claims
- 2071US5712793APhysical design automation system and process for designing integrated circuit chips using fuzzy cell clusterizationLSI LOGIC CORP·Filed 1995·Granted Jan 27, 1998·64 cites·36 claims
- 2167US6637011B1Method and apparatus for quick search for identities applicable to specified formulaLSI LOGIC CORP·Filed 2000·Granted Oct 21, 2003·13 cites·18 claims
- 2262US6097073ATriangular semiconductor or gateLSI LOGIC CORP·Filed 1995·Granted Aug 1, 2000·27 cites·26 claims
- 2361US6868535B1Method and apparatus for optimizing the timing of integrated circuitsLSI LOGIC CORP·Filed 2001·Granted Mar 15, 2005·13 cites·17 claims
- 2461US6312980B1Programmable triangular shaped device having variable gainLSI LOGIC CORP·Filed 1998·Granted Nov 6, 2001·26 cites·11 claims
- 2556US5909376APhysical design automation system and process for designing integrated circuit chips using highly parallel sieve optimization with multiple "jiggles"LSI LOGIC CORP·Filed 1995·Granted Jun 1, 1999·32 cites·32 claims
- 2653US5864165ATriangular semiconductor NAND gateLSI LOGIC CORP·Filed 1995·Granted Jan 26, 1999·18 cites·95 claims
- 2751US7003739B2Method and apparatus for finding optimal unification substitution for formulas in technology libraryLSI LOGIC CORP·Filed 2003·Granted Feb 21, 2006·2 cites·22 claims
- 2851US5835378AComputer implemented method for leveling interconnect wiring density in a cell placement for an integrated circuit chipLSI LOGIC CORP·Filed 1995·Granted Nov 10, 1998·24 cites·30 claims
- 2951US5801422AHexagonal SRAM architectureLSI LOGIC CORP·Filed 1995·Granted Sep 1, 1998·16 cites·67 claims
- 3047US5838585APhysical design automation system and method using monotonically improving linear clusterizationLSI LOGIC CORP·Filed 1997·Granted Nov 17, 1998·19 cites·35 claims
- 3144US5834821ATriangular semiconductor "AND" gate deviceLSI LOGIC CORP·Filed 1995·Granted Nov 10, 1998·11 cites·37 claims
- 3242US5654563AMicroelectronic integrated circuit including triangular semiconductor "or"gLSI LOGIC CORP·Filed 1995·Granted Aug 5, 1997·7 cites·39 claims
- 3340US5631581AMicroelectronic integrated circuit including triangular semiconductor "and" gate deviceLSI LOGIC CORP·Filed 1995·Granted May 20, 1997·6 cites·38 claims
- 3430US5784287APhysical design automation system and process for designing integrated circuit chips using generalized assignmentLSI LOGIC CORP·Filed 1995·Granted Jul 21, 1998·1 cites·32 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →