Inventor · disambiguated record
Alan G. Smith
Also filed as: SMITH ALAN G
12 granted patents·3 pending applications·186 citations·filing 1993–2014
92Inventor score
Top patents by PatentIndex Score
15 records- 0188US7500162B2Sourcing internal signals to output pins of an integrated circuit through sequential multiplexingCPU TECHNOLOGY INC·Filed 2005·Granted Mar 3, 2009·19 cites·23 claims
- 0261US5855778AFilter pressWILLIAM R PERRIN ONTARIO LTD·Filed 1997·Granted Jan 5, 1999·33 cites·14 claims
- 0360US7630875B2Automatic time warp for electronic system simulationCPU TECHNOLOGY INC·Filed 2005·Granted Dec 8, 2009·4 cites·16 claims
- 0455US5761455ADynamic bus reconfiguration logicCPU TECHNOLOGY INC·Filed 1995·Granted Jun 2, 1998·31 cites·15 claims
- 0553US5499376AHigh speed mask and logical combination operations for parallel processor unitsCPU TECHNOLOGY INC·Filed 1993·Granted Mar 12, 1996·22 cites·10 claims
- 0651US5852564AMethod and apparatus for interactively displaying signal information during computer simulation of an electrical circuitCPU TECHNOLOGY INC·Filed 1996·Granted Dec 22, 1998·22 cites·15 claims
- 0750US5848276AHigh speed, direct register access operation for parallel processing unitsCPU TECHNOLOGY INC·Filed 1995·Granted Dec 8, 1998·24 cites·5 claims
- 0849US7653632B2File system for storing multiple files as a single compressed fileTEXAS INSTRUMENTS INC·Filed 2002·Granted Jan 26, 2010·1 cites·6 claims
- 0946US5615356AMethod and apparatus for interactively displaying signal information during computer simulation of an electrical circuitCPU TECHNOLOGY INC·Filed 1994·Granted Mar 25, 1997·15 cites·7 claims
- 1044US2015248295A1Numerical stall analysis of cpu performanceQUALCOMM INC·Filed 2014·Application pending·0 cites
- 1143US2005071378A1Method of storing applications on removable storageFiled 2003·Application pending·0 cites
- 1237US5838961AMethod of operation and apparatus for optimizing execution of short instruction branchesCPU TECHNOLOGY INC·Filed 1996·Granted Nov 17, 1998·10 cites·10 claims
- 1331US2004075693A1Compact method of navigating hierarchical menus on an electronic device having a small display screenFiled 2002·Application pending·0 cites
- 1429US5652907AHigh speed mask and logical combination operations for parallel processor unitsCPU TECHNOLOGY INC·Filed 1995·Granted Jul 29, 1997·0 cites·10 claims
- 1528US5832253AMultiprocessors system for selectively wire-oring a combination of signal lines and thereafter using one line to control the running or stalling of a selected processorCPU TECHNOLOGY INC·Filed 1993·Granted Nov 3, 1998·5 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →