Inventor · disambiguated record
Alexey P. Suprun
Also filed as: SUPRUN ALEXEY · SUPRUN ALEXEY P
10 granted patents·2 pending applications·43 citations·filing 2014–2025
86Inventor score
Top patents by PatentIndex Score
12 records- 0195US10572568B2Accelerator for sparse-dense matrix multiplicationINTEL CORP·Filed 2018·Granted Feb 25, 2020·28 cites·20 claims
- 0293US10867009B2Accelerator for sparse-dense matrix multiplicationINTEL CORP·Filed 2020·Granted Dec 15, 2020·4 cites·9 claims
- 0386US10984074B2Accelerator for sparse-dense matrix multiplicationINTEL CORP·Filed 2020·Granted Apr 20, 2021·2 cites·7 claims
- 0483US11829440B2Accelerator for sparse-dense matrix multiplicationINTEL CORP·Filed 2021·Granted Nov 28, 2023·1 cites·21 claims
- 0583US2025272355A1Accelerator for sparse-dense matrix multiplicationINTEL CORP·Filed 2025·Application pending·0 cites
- 0683US2025272354A1Accelerator for sparse-dense matrix multiplicationINTEL CORP·Filed 2025·Application pending·0 cites
- 0774US10175986B2Stateless capture of data linear addresses during precise event based samplingINTEL CORP·Filed 2017·Granted Jan 8, 2019·2 cites·20 claims
- 0873US11037050B2Apparatuses, methods, and systems for memory interface circuit arbitration in a configurable spatial acceleratorINTEL CORP·Filed 2019·Granted Jun 15, 2021·4 cites·24 claims
- 0960US9652237B2Stateless capture of data linear addresses during precise event based samplingGRAMUNT ROGER·Filed 2014·Granted May 16, 2017·2 cites·20 claims
- 1047US10318427B2Resolving memory accesses crossing cache line boundariesINTEL CORP·Filed 2014·Granted Jun 11, 2019·0 cites·18 claims
- 1145US9886396B2Scalable event handling in multi-threaded processor coresINTEL CORP·Filed 2014·Granted Feb 6, 2018·0 cites·15 claims
- 1237US9891914B2Method and apparatus for performing an efficient scatterMATAS RAMON·Filed 2015·Granted Feb 13, 2018·0 cites·25 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →