Inventor · disambiguated record
Amram Eitan
Also filed as: EITAN AMRAM
18 granted patents·22 pending applications·61 citations·filing 2005–2025
91Inventor score
Files withINTEL CORP22TAIWAN SEMICONDUCTOR MFG CO LTD15DIAS RAJENDRA C1PRACK EDWARD R1RARAVIKAR NACHIKET R1
Top patents by PatentIndex Score
40 records- 0194US11075166B2Microelectronic structures having multiple microelectronic devices connected with a microelectronic bridge embedded in a microelectronic substrateINTEL CORP·Filed 2020·Granted Jul 27, 2021·3 cites·18 claims
- 0293US10418329B2Microelectronic structures having multiple microelectronic devices connected with a microelectronic bridge embedded in a microelectronic substrateINTEL CORP·Filed 2015·Granted Sep 17, 2019·11 cites·23 claims
- 0390US9282650B2Thermal compression bonding process cooling manifoldINTEL CORP·Filed 2013·Granted Mar 8, 2016·14 cites·13 claims
- 0488US2025329604A1Microelectronics package comprising a package-on-package (pop) architecture with inkjet barrier material for controlling bondline thickness and pop adhesive keep out zoneINTEL CORP·Filed 2025·Application pending·0 cites
- 0587US9653411B1Electronic package that includes fine powder coatingINTEL CORP·Filed 2015·Granted May 16, 2017·10 cites·10 claims
- 0685US7402909B2Microelectronic package interconnect and method of fabrication thereofINTEL CORP·Filed 2005·Granted Jul 22, 2008·12 cites·15 claims
- 0784US12417958B2Microelectronics package comprising a package-on-package (PoP) architecture with inkjet barrier material for controlling bondline thickness and PoP adhesive keep out zoneINTEL CORP·Filed 2023·Granted Sep 16, 2025·0 cites·14 claims
- 0883US12347743B2Microelectronics package comprising a package-on-package (PoP) architecture with inkjet barrier material for controlling bondline thickness and pop adhesive keep out zoneINTEL CORP·Filed 2023·Granted Jul 1, 2025·0 cites·20 claims
- 0982US9748199B2Thermal compression bonding process cooling manifoldINTEL CORP·Filed 2016·Granted Aug 29, 2017·4 cites·16 claims
- 1081US2024014097A1Microelectronics package comprising a package-on-package (pop) architecture with inkjet barrier material for controlling bondline thickness and pop adhesive keep out zoneINTEL CORP·Filed 2023·Application pending·0 cites
- 1175US7727814B2Microelectronic package interconnect and method of fabrication thereofINTEL CORP·Filed 2008·Granted Jun 1, 2010·5 cites·14 claims
- 1273US2025343065A1Method for forming package structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 1372US11676900B2Electronic assembly that includes a bridgeINTEL CORP·Filed 2015·Granted Jun 13, 2023·2 cites·12 claims
- 1470US12506109B2Die bonding tool with tiltable bond head for improved bonding and methods for performing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Dec 23, 2025·0 cites·20 claims
- 1568US2025253184A1Processing apparatus and method for forming package structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 1665US12315777B2Microelectronics package comprising a package-on-package (POP) architecture with inkjet barrier material for controlling bondline thickness and POP adhesive keep out zoneINTEL CORP·Filed 2019·Granted May 27, 2025·0 cites·23 claims
- 1760US2025367865A1Die ejector having independently engaged ejector rods, method of performing die pick-up with the die ejector, and die ejector system including the die ejectorTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 1859US10790231B2Microelectronic structures having multiple microelectronic devices connected with a microelectronic bridge embedded in a microelectronic substrateINTEL CORP·Filed 2019·Granted Sep 29, 2020·0 cites·22 claims
- 1958US12341117B2Methods and apparatus to reduce defects in interconnects between semiconductor dies and package substratesINTEL CORP·Filed 2021·Granted Jun 24, 2025·0 cites·25 claims
- 2058US2025125194A1Improved surface pre-treatment for semiconductor device bonding structures and methods of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Application pending·0 cites
- 2158US2025391810A1Systems for optical oxide detection in semiconductor devices and methods for performing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 2258US2025125309A1Semiconductor device structure with compressible bonds and methods for forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Application pending·0 cites
- 2356US2024404839A1Wire bonding using in-situ plasma treatment and apparatus for effecting the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Application pending·0 cites
- 2455US2025062274A1Bonding apparatus and method of manufacturing an integrated circuit package using the apparatusTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Application pending·0 cites
- 2555US2024404989A1Parallel plasma treatment and thermocompression bonding and apparatus for effecting the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Application pending·0 cites
- 2655US2025054786A1Die bonding tool with movable component for improved die protrusion control and methods for using the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Application pending·0 cites
- 2755US2025132284A1Die bonding tool with tiltable bond stage and methods for performing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Application pending·0 cites
- 2855US2024404988A1Fluxless die bonding using in-situ plasma treatment and apparatus for effecting the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Application pending·0 cites
- 2954US2025006690A1Post-plasma clean infrared image inspection for oxideless bonding and apparatus for effecting the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Application pending·0 cites
- 3053US2024047408A1Semiconductor package with a stacked film structure to reduce cracking and delamination and methods of making the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Application pending·0 cites
- 3145US7851342B2In-situ formation of conductive filling material in through-silicon viaINTEL CORP·Filed 2007·Granted Dec 14, 2010·0 cites·20 claims
- 3244US7557036B2Method, system, and apparatus for filling viasINTEL CORP·Filed 2006·Granted Jul 7, 2009·0 cites·11 claims
- 3344US2009294515A1Mounting integrated circuit components on substratesPRACK EDWARD R·Filed 2008·Application pending·0 cites
- 3441US2019202136A1Component coupling via plurality of adhesive elementsINTEL CORP·Filed 2017·Application pending·0 cites
- 3539US2007152314A1Low stress stacked die packagesINTEL CORP·Filed 2005·Application pending·0 cites
- 3637US2019099777A1Compressible media applicator, application system and methods for sameINTEL CORP·Filed 2017·Application pending·0 cites
- 3736US2019206821A1Substrate assembly with spacer elementINTEL CORP·Filed 2017·Application pending·0 cites
- 3835US9786517B2Ablation method and recipe for wafer level underfill material patterning and removalDIAS RAJENDRA C·Filed 2013·Granted Oct 10, 2017·0 cites·13 claims
- 3935US2007298525A1Integrated microelectronic package stress sensorRARAVIKAR NACHIKET R·Filed 2006·Application pending·0 cites
- 4033US10475715B2Two material high K thermal encapsulant systemINTEL CORP·Filed 2015·Granted Nov 12, 2019·0 cites·11 claims
Join the waitlist — get patent alerts
Get an alert when Amram Eitan files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →