Inventor · disambiguated record
Amlan Ghosh
Also filed as: GHOSH AMLAN
7 granted patents·9 pending applications·56 citations·filing 2007–2025
81Inventor score
Top patents by PatentIndex Score
16 records- 0192US8526256B2Single-ended sense amplifier with read-assistGHOSH AMLAN·Filed 2011·Granted Sep 3, 2013·39 cites·22 claims
- 0291US11349458B1Transistor aging monitor circuit for increased stress-based aging compensation precision, and related methodsMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2021·Granted May 31, 2022·4 cites·21 claims
- 0378US10438636B2Capacitive structure for memory write assistADVANCED MICRO DEVICES INC·Filed 2017·Granted Oct 8, 2019·4 cites·16 claims
- 0477US9355743B2Memory array test logicADVANCED MICRO DEVICES INC·Filed 2014·Granted May 31, 2016·6 cites·13 claims
- 0569US2025301619A1Balanced static random-access memory (sram)INTEL CORP·Filed 2024·Application pending·0 cites
- 0667US2025299727A1Static random-access memoryINTEL CORP·Filed 2025·Application pending·0 cites
- 0756US7548822B2Apparatus and method for determining the slew rate of a signal produced by an integrated circuitIBM·Filed 2007·Granted Jun 16, 2009·2 cites·7 claims
- 0854US9373418B2Circuit and data processor with headroom monitoring and method thereforADVANCED MICRO DEVICES INC·Filed 2014·Granted Jun 21, 2016·1 cites·19 claims
- 0947US2025210102A1Memory bitcell with balanced diffusion layoutINTEL CORP·Filed 2023·Application pending·0 cites
- 1044US2024331761A1N-p balanced multi-port register file with complementary field-effect transistors (cfets)INTEL CORP·Filed 2023·Application pending·0 cites
- 1143US2024118826A1Memory array utilizing bitcells with single-ended read circuitryINTEL CORP·Filed 2022·Application pending·0 cites
- 1242US2024221825A1Register file arrays with multiplexed read path circuitryRILEY JOHN R·Filed 2023·Application pending·0 cites
- 1342US2024428851A1Memory with charge sharing bitlinesINTEL CORP·Filed 2023·Application pending·0 cites
- 1439US11640841B2Memory systems including memory arrays employing column read circuits to control floating of column read bit lines, and related methodsMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2021·Granted May 2, 2023·0 cites·17 claims
- 1539US2024005982A1Multi-ported memory array utilizing bitcells with balanced p-n diffusion layoutsGHOSH AMLAN·Filed 2022·Application pending·0 cites
- 1638US2022383946A1Memory bit cell including write control circuits for coupling control of voltage sources to avoid or reduce write contention, and related methodsMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2021·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →