Inventor · disambiguated record
Anthony P. Ingraham
Also filed as: INGRAHAM ANTHONY P · INGRAHAM ANTHONY PAUL
23 granted patents·1,413 citations·filing 1990–2000
97Inventor score
Files withIBM23
Top patents by PatentIndex Score
23 records- 0194US5926369AVertically integrated multi-chip circuit package with heat-sink supportIBM·Filed 1998·Granted Jul 20, 1999·182 cites·31 claims
- 0294US5185073AMethod of fabricating nendritic materialsIBM·Filed 1991·Granted Feb 9, 1993·173 cites·4 claims
- 0393US5420520AMethod and apparatus for testing of integrated circuit chipsIBM·Filed 1993·Granted May 30, 1995·128 cites·3 claims
- 0491US5137461ASeparable electrical connection technologyIBM·Filed 1990·Granted Aug 11, 1992·134 cites·8 claims
- 0589US6061245AFree standing, three dimensional, multi-chip, carrier package with air flow baffleIBM·Filed 1998·Granted May 9, 2000·91 cites·14 claims
- 0689US5949246ATest head for applying signals in a burn-in test of an integrated circuitIBM·Filed 1997·Granted Sep 7, 1999·65 cites·4 claims
- 0787US5523696AMethod and apparatus for testing integrated circuit chipsIBM·Filed 1993·Granted Jun 4, 1996·64 cites·7 claims
- 0886US5528159AMethod and apparatus for testing integrated circuit chipsIBM·Filed 1995·Granted Jun 18, 1996·63 cites·10 claims
- 0985US6121069AInterconnect structure for joining a chip to a circuit cardIBM·Filed 1999·Granted Sep 19, 2000·66 cites·12 claims
- 1084US6094060ATest head for applying signals in a burn-in test of an integrated circuitIBM·Filed 1999·Granted Jul 25, 2000·44 cites·7 claims
- 1184US5391514ALow temperature ternary C4 flip chip bonding methodIBM·Filed 1994·Granted Feb 21, 1995·79 cites·6 claims
- 1281US6094059AApparatus and method for burn-in/testing of integrated circuit devicesIBM·Filed 1999·Granted Jul 25, 2000·39 cites·2 claims
- 1381US6075287AIntegrated, multi-chip, thermally conductive packaging device and methodologyIBM·Filed 1997·Granted Jun 13, 2000·70 cites·30 claims
- 1480US5940729AMethod of planarizing a curved substrate and resulting structureIBM·Filed 1996·Granted Aug 17, 1999·41 cites·24 claims
- 1576US5953623ABall limiting metal mask and tin enrichment of high melting point solder for low temperature interconnectionIBM·Filed 1997·Granted Sep 14, 1999·43 cites·20 claims
- 1668US6414509B1Method and apparatus for in-situ testing of integrated circuit chipsIBM·Filed 2000·Granted Jul 2, 2002·18 cites·5 claims
- 1768US5672980AMethod and apparatus for testing integrated circuit chipsIBM·Filed 1996·Granted Sep 30, 1997·26 cites·2 claims
- 1863US5759046ADendritic interconnection systemIBM·Filed 1996·Granted Jun 2, 1998·24 cites·22 claims
- 1961US6256203B1Free standing, three dimensional, multi-chip, carrier package with air flow baffleIBM·Filed 1999·Granted Jul 3, 2001·22 cites·20 claims
- 2048US6150255AMethod of planarizing a curved substrate and resulting structureIBM·Filed 1999·Granted Nov 21, 2000·11 cites·13 claims
- 2146US5709336AMethod of forming a solderless electrical connection with a wirebond chipIBM·Filed 1996·Granted Jan 20, 1998·13 cites·7 claims
- 2242US5994910AApparatus, and corresponding method, for stress testing wire bond-type semi-conductor chipsIBM·Filed 1998·Granted Nov 30, 1999·9 cites·19 claims
- 2341US5659256AMethod and apparatus for testing integrated circuit chipsIBM·Filed 1996·Granted Aug 19, 1997·8 cites·3 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →