Inventor · disambiguated record
Anders Landin
Also filed as: LANDIN ANDERS
20 granted patents·9 pending applications·148 citations·filing 2002–2009
94Inventor score
Top patents by PatentIndex Score
29 records- 0193US7676636B2Method and apparatus for implementing virtual transactional memory using cache line markingSUN MICROSYSTEMS INC·Filed 2007·Granted Mar 9, 2010·32 cites·24 claims
- 0286US8102663B2Proximity communication package for processor, cache and memoryCUNNINGHAM JOHN E·Filed 2007·Granted Jan 24, 2012·15 cites·20 claims
- 0383US8606997B2Cache hierarchy with bounds on levels accessedCYPHER ROBERT·Filed 2008·Granted Dec 10, 2013·14 cites·20 claims
- 0483US7480770B2Semi-blocking deterministic directory coherenceSUN MICROSYSTEMS INC·Filed 2006·Granted Jan 20, 2009·15 cites·20 claims
- 0577US7376793B2Cache coherence protocol with speculative writestreamSUN MICROSYSTEMS INC·Filed 2005·Granted May 20, 2008·8 cites·17 claims
- 0672US7509460B2DRAM remote access cache in local memory in a distributed shared memory systemSUN MICROSYSTEMS INC·Filed 2006·Granted Mar 24, 2009·6 cites·17 claims
- 0772US6973547B2Coherence message prediction mechanism and multiprocessing computer system employing the sameSUN MICROSYSTEMS INC·Filed 2002·Granted Dec 6, 2005·17 cites·25 claims
- 0865US7529893B2Multi-node system with split ownership and access right coherence mechanismSUN MICROSYSTEMS INC·Filed 2004·Granted May 5, 2009·11 cites·16 claims
- 0965US7412567B2Value-based memory coherence supportSUN MICROSYSTEMS INC·Filed 2006·Granted Aug 12, 2008·3 cites·19 claims
- 1060US7363462B2Performing virtual to global address translation in processing subsystemSUN MICROSYSTEMS INC·Filed 2004·Granted Apr 22, 2008·7 cites·18 claims
- 1159US7360056B2Multi-node system in which global address generated by processing subsystem includes global to local translation informationSUN MICROSYSTEMS INC·Filed 2004·Granted Apr 15, 2008·6 cites·15 claims
- 1256US7606978B2Multi-node computer system implementing global access state dependent transactionsSUN MICROSYSTEMS INC·Filed 2004·Granted Oct 20, 2009·4 cites·31 claims
- 1353US7765381B2Multi-node system in which home memory subsystem stores global to local address translation information for replicating nodesORACLE AMERICA INC·Filed 2004·Granted Jul 27, 2010·3 cites·18 claims
- 1452US8010749B2Multi-node computer system with proxy transaction to read data from a non-owning memory deviceORACLE AMERICA INC·Filed 2004·Granted Aug 30, 2011·2 cites·32 claims
- 1551US7360029B2Multi-node computer system in which interfaces provide data to satisfy coherency transactions when no owning device present in modified global access state nodeSUN MICROSYSTEMS INC·Filed 2004·Granted Apr 15, 2008·2 cites·27 claims
- 1650US8024526B2Multi-node system with global access statesORACLE AMERICA INC·Filed 2004·Granted Sep 20, 2011·1 cites·23 claims
- 1750US7945738B2Multi-node computer system employing a reporting mechanism for multi-node transactionsORACLE AMERICA INC·Filed 2004·Granted May 17, 2011·1 cites·38 claims
- 1850US7120756B2Computer system including a promise arraySUN MICROSYSTEMS INC·Filed 2003·Granted Oct 10, 2006·1 cites·20 claims
- 1949US2010325374A1Dynamically configuring memory interleaving for locality and performance isolationSUN MICROSYSTEMS INC·Filed 2009·Application pending·0 cites
- 2048US8645632B2Speculative writestream transactionCYPHER ROBERT E·Filed 2009·Granted Feb 4, 2014·0 cites·16 claims
- 2147US2009089537A1Apparatus and method for memory address translation across multiple nodesSUN MICROSYSTEMS INC·Filed 2007·Application pending·0 cites
- 2245US2004260887A1Multi-node computer system implementing speculative proxy transactionsSUN MICROSYSTEMS INC·Filed 2004·Application pending·0 cites
- 2345US2005005075A1Multi-node computer system employing multiple memory response statesSUN MICROSYSTEMS INC·Filed 2004·Application pending·0 cites
- 2445US2004260886A1Multi-node system with interface intervention to satisfy coherency transactions transparently to active devicesSUN MICROSYSTEMS INC·Filed 2004·Application pending·0 cites
- 2545US2008010417A1Read/Write Permission Bit Support for Efficient Hardware to Software HandoverZEFFER HAKAN E·Filed 2007·Application pending·0 cites
- 2645US2005010615A1Multi-node computer system implementing memory-correctable speculative proxy transactionsSUN MICROSYSTEMS INC·Filed 2004·Application pending·0 cites
- 2745US2005044174A1Multi-node computer system where active devices selectively initiate certain transactions using remote-type address packetsSUN MICROSYSTEMS INC·Filed 2004·Application pending·0 cites
- 2844US7055016B2Computer system including a memory controller configured to perform pre-fetch operationsSUN MICROSYSTEMS INC·Filed 2003·Granted May 30, 2006·0 cites·37 claims
- 2944US2005027947A1Multi-node computer system including a mechanism to encode node ID of a transaction-initiating node in invalidating proxy address packetsSUN MICROSYSTEMS INC·Filed 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →