Inventor · disambiguated record
Andrew Leaver
Also filed as: LEAVER ANDREW
12 granted patents·1 pending application·399 citations·filing 1998–2018
92Inventor score
Top patents by PatentIndex Score
13 records- 0198US6407576B1Interconnection and input/output resources for programmable logic integrated circuit devicesALTERA CORP·Filed 2000·Granted Jun 18, 2002·183 cites·41 claims
- 0295US7669157B1Method and apparatus for performing incremental compilation using top-down and bottom-up design approachesALTERA CORP·Filed 2006·Granted Feb 23, 2010·28 cites·21 claims
- 0387US7492188B2Interconnection and input/output resources for programmable logic integrated circuit devicesALTERA CORP·Filed 2007·Granted Feb 17, 2009·9 cites·22 claims
- 0486US6195788B1Mapping heterogeneous logic elements in a programmable logic deviceALTERA CORP·Filed 1998·Granted Feb 27, 2001·134 cites·29 claims
- 0582US7464362B1Method and apparatus for performing incremental compilationALTERA CORP·Filed 2006·Granted Dec 9, 2008·12 cites·17 claims
- 0679US6989689B2Interconnection and input/output resources for programmable logic integrated circuit devicesALTERA CORP·Filed 2004·Granted Jan 24, 2006·13 cites·18 claims
- 0775US8250505B1Method and apparatus for performing incremental compilation using top-down and bottom-up design approachesBORER TERRY·Filed 2009·Granted Aug 21, 2012·5 cites·17 claims
- 0874US7839167B2Interconnection and input/output resources for programmable logic integrated circuit devicesALTERA CORP·Filed 2009·Granted Nov 23, 2010·4 cites·20 claims
- 0966US8589838B1M/A for performing incremental compilation using top-down and bottom-up design approachesBORER TERRY·Filed 2012·Granted Nov 19, 2013·1 cites·24 claims
- 1064US6894533B2Interconnection and input/output resources for programmable logic integrated circuit devicesALTERA CORP·Filed 2003·Granted May 17, 2005·6 cites·17 claims
- 1159US8166427B1Tracing and reporting registers removed during synthesisPATHAK SWATIBEN RUTURAJ·Filed 2008·Granted Apr 24, 2012·4 cites·27 claims
- 1257US9122826B1Method and apparatus for performing compilation using multiple design flowsALTERA CORP·Filed 2013·Granted Sep 1, 2015·0 cites·24 claims
- 1336US2020232444A1Device and method for performing retrofitting process on a wind turbine bladeVESTAS WIND SYS AS·Filed 2018·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →