Inventor · disambiguated record
Ankireddy Nalamalpu
Also filed as: NALAMALPU ANKIREDDY
53 granted patents·44 pending applications·51 citations·filing 2016–2025
97Inventor score
Top patents by PatentIndex Score
97 records- 0197US11929339B2Innovative interconnect design for package architecture to improve latencyINTEL CORP·Filed 2023·Granted Mar 12, 2024·2 cites·20 claims
- 0294US10649927B2Dual in-line memory module (DIMM) programmable accelerator cardINTEL CORP·Filed 2018·Granted May 12, 2020·16 cites·15 claims
- 0393US11557541B2Interconnect architecture with silicon interposer and EMIBINTEL CORP·Filed 2018·Granted Jan 17, 2023·6 cites·25 claims
- 0492US12353238B2Flexible instruction set architecture supporting varying frequenciesINTEL CORP·Filed 2021·Granted Jul 8, 2025·2 cites·22 claims
- 0591US12026008B2Techniques for clock signal transmission in integrated circuits and interposersINTEL CORP·Filed 2022·Granted Jul 2, 2024·1 cites·19 claims
- 0691US11216397B2Translation circuitry for an interconnection in an active interposer of a semiconductor packageINTEL CORP·Filed 2019·Granted Jan 4, 2022·6 cites·20 claims
- 0789US11080449B2Modular periphery tile for integrated circuit deviceINTEL CORP·Filed 2020·Granted Aug 3, 2021·2 cites·20 claims
- 0888US12334449B2Selective use of different advanced interface bus with electronic chipsINTEL CORP·Filed 2020·Granted Jun 17, 2025·2 cites·20 claims
- 0987US2025077753A1Modular periphery tile for integrated circuit deviceALTERA CORP·Filed 2024·Application pending·0 cites
- 1086US12266625B2Innovative interconnect design for package architecture to improve latencyINTEL CORP·Filed 2024·Granted Apr 1, 2025·0 cites·20 claims
- 1186US10642946B2Modular periphery tile for integrated circuit deviceINTEL CORP·Filed 2018·Granted May 5, 2020·3 cites·17 claims
- 1285US11609262B2On-die aging measurements for dynamic timing modelingINTEL CORP·Filed 2018·Granted Mar 21, 2023·2 cites·20 claims
- 1382US12153866B2Modular periphery tile for integrated circuit deviceINTEL CORP·Filed 2023·Granted Nov 26, 2024·0 cites·20 claims
- 1481US12347783B2Interconnect architecture with silicon interposer and EMIBINTEL CORP·Filed 2024·Granted Jul 1, 2025·0 cites·20 claims
- 1581US12206410B2Programmable logic device with fine-grained disaggregationINTEL CORP·Filed 2023·Granted Jan 21, 2025·0 cites·20 claims
- 1681US10601426B1Programmable logic device with fine-grained disaggregationINTEL CORP·Filed 2018·Granted Mar 24, 2020·2 cites·21 claims
- 1779US2025286555A1Power Management using Voltage Islands on Programmable Logic DevicesALTERA CORP·Filed 2025·Application pending·0 cites
- 1878US12237831B2Network-on-chip (NOC) with flexible data widthINTEL CORP·Filed 2023·Granted Feb 25, 2025·0 cites·16 claims
- 1978US12216150B2On-die aging measurements for dynamic timing modelingINTEL CORP·Filed 2022·Granted Feb 4, 2025·0 cites·20 claims
- 2078US11901299B2Interconnect architecture with silicon interposer and EMIBINTEL CORP·Filed 2022·Granted Feb 13, 2024·0 cites·25 claims
- 2178US11500412B2Techniques for clock signal transmission in integrated circuits and interposersINTEL CORP·Filed 2019·Granted Nov 15, 2022·2 cites·16 claims
- 2278US2025315079A1Flexible Instruction Set Architecture Supporting Varying FrequenciesALTERA CORP·Filed 2025·Application pending·0 cites
- 2377US2025271826A1Systems and methods to reduce voltage guardbandALTERA CORP·Filed 2025·Application pending·0 cites
- 2476US11915996B2Microelectronics assembly including top and bottom packages in stacked configuration with shared coolingINTEL CORP·Filed 2019·Granted Feb 27, 2024·2 cites·20 claims
- 2576US11658144B2Innovative interconnect design for package architecture to improve latencyINTEL CORP·Filed 2021·Granted May 23, 2023·0 cites·20 claims
- 2675US12379698B2Systems and methods to reduce voltage guardbandINTEL CORP·Filed 2021·Granted Aug 5, 2025·0 cites·21 claims
- 2775US11714941B2Modular periphery tile for integrated circuit deviceINTEL CORP·Filed 2021·Granted Aug 1, 2023·0 cites·20 claims
- 2875US11528029B2Apparatus to synchronize clocks of configurable integrated circuit dies through an interconnect bridgeINTEL CORP·Filed 2018·Granted Dec 13, 2022·2 cites·20 claims
- 2974US11595045B2Programmable logic device with fine-grained disaggregationINTEL CORP·Filed 2021·Granted Feb 28, 2023·0 cites·20 claims
- 3074US2025167786A1Network-on-chip (noc) with flexible data widthALTERA CORP·Filed 2025·Application pending·0 cites
- 3173US2021288013A1Interface Bus for Inter-Die Communication in a Multi-Chip Package Over High Density InterconnectsINTEL CORP·Filed 2021·Application pending·0 cites
- 3272US11700002B2Network-on-chip (NOC) with flexible data widthINTEL CORP·Filed 2021·Granted Jul 11, 2023·0 cites·20 claims
- 3372US11621713B2High-speed core interconnect for multi-die programmable logic devicesINTEL CORP·Filed 2021·Granted Apr 4, 2023·0 cites·20 claims
- 3472US2025285985A1Selective use of different advanced interface bus with electronic chipsALTERA CORP·Filed 2025·Application pending·0 cites
- 3571US11070209B2Programmable logic device with fine-grained disaggregationINTEL CORP·Filed 2020·Granted Jul 20, 2021·0 cites·7 claims
- 3670US11669472B2Frequency translation circuitry for an interconnection in an active interposer of a semiconductor packageINTEL CORP·Filed 2021·Granted Jun 6, 2023·0 cites·20 claims
- 3769US12487658B2Workload-dependent integrated circuit operation based on power headroomINTEL CORP·Filed 2021·Granted Dec 2, 2025·0 cites·20 claims
- 3869US12355359B2Switch based on load currentINTEL CORP·Filed 2021·Granted Jul 8, 2025·0 cites·20 claims
- 3969US11342918B2Network-on-chip (NOC) with flexible data widthINTEL CORP·Filed 2020·Granted May 24, 2022·0 cites·20 claims
- 4069US2024028544A1Inter-die communication of programmable logic devicesINTEL CORP·Filed 2023·Application pending·0 cites
- 4168US12429900B2Controlled transition between configuration mode and user mode to reduce current-resistance voltage dropINTEL CORP·Filed 2021·Granted Sep 30, 2025·0 cites·20 claims
- 4268US11342238B2Rotatable architecture for multi-chip package (MCP)INTEL CORP·Filed 2018·Granted May 24, 2022·1 cites·20 claims
- 4368US11128301B2High-speed core interconnect for multi-die programmable logic devicesINTEL CORP·Filed 2020·Granted Sep 21, 2021·0 cites·20 claims
- 4467US12341511B2Power management using voltage islands on programmable logic devicesINTEL CORP·Filed 2021·Granted Jun 24, 2025·0 cites·20 claims
- 4564US10790827B2Network-on-chip (NOC) with flexible data widthINTEL CORP·Filed 2018·Granted Sep 29, 2020·0 cites·20 claims
- 4661US12481345B2Techniques for power management in compute circuitsINTEL CORP·Filed 2022·Granted Nov 25, 2025·0 cites·20 claims
- 4761US11121109B2Innovative interconnect design for package architecture to improve latencyINTEL CORP·Filed 2018·Granted Sep 14, 2021·0 cites·20 claims
- 4861US11056452B2Interface bus for inter-die communication in a multi-chip package over high density interconnectsINTEL CORP·Filed 2018·Granted Jul 6, 2021·0 cites·15 claims
- 4961US2024321716A1Electronic Devices Having Oval Power Delivery PadsALTERA CORP·Filed 2024·Application pending·0 cites
- 5061US2024312905A1Techniques For Providing Supply Current To Dies In A System Using An InductorALTERA CORP·Filed 2024·Application pending·0 cites
Showing the top 50 of 97 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →