Inventor · disambiguated record
Antonino Pollio
Also filed as: POLLIO ANTONINO
24 granted patents·6 pending applications·43 citations·filing 2004–2024
93Inventor score
Files withMICRON TECHNOLOGY INC26FALANGA FRANCESCO1IACULO MASSIMO1ST MICROELECTRONICS SRL1TIZIANI FEDERICO1
Top patents by PatentIndex Score
30 records- 0189US10108372B2Methods and apparatuses for executing a plurality of queued tasks in a memoryMICRON TECHNOLOGY INC·Filed 2015·Granted Oct 23, 2018·6 cites·19 claims
- 0289US9213603B2Controller to manage NAND memoriesMICRON TECHNOLOGY INC·Filed 2014·Granted Dec 15, 2015·9 cites·20 claims
- 0386US8806293B2Controller to execute error correcting code algorithms and manage NAND memoriesTIZIANI FEDERICO·Filed 2008·Granted Aug 12, 2014·17 cites·20 claims
- 0484US11238940B1Initialization techniques for memory devicesMICRON TECHNOLOGY INC·Filed 2020·Granted Feb 1, 2022·2 cites·35 claims
- 0578US11513952B2Data separation for garbage collectionMICRON TECHNOLOGY INC·Filed 2020·Granted Nov 29, 2022·1 cites·23 claims
- 0677US12353750B2Idle mode temperature control for memory systemsMICRON TECHNOLOGY INC·Filed 2024·Granted Jul 8, 2025·0 cites·20 claims
- 0776US9189390B2Wear leveling for erasable memoriesMICRON TECHNOLOGY INC·Filed 2014·Granted Nov 17, 2015·3 cites·23 claims
- 0874US12360914B2Dynamic updates to logical-to-physical address translation table bitmapsMICRON TECHNOLOGY INC·Filed 2024·Granted Jul 15, 2025·0 cites·20 claims
- 0974US9971536B2Controller to manage NAND memoriesMICRON TECHNOLOGY INC·Filed 2017·Granted May 15, 2018·1 cites·20 claims
- 1073US11023167B2Methods and apparatuses for executing a plurality of queued tasks in a memoryMICRON TECHNOLOGY INC·Filed 2018·Granted Jun 1, 2021·1 cites·21 claims
- 1171US11768627B2Techniques for page line filler dataMICRON TECHNOLOGY INC·Filed 2023·Granted Sep 26, 2023·0 cites·20 claims
- 1270US12141059B2Data separation for garbage collectionMICRON TECHNOLOGY INC·Filed 2022·Granted Nov 12, 2024·0 cites·20 claims
- 1370US12007897B2Split cache for address mapping dataMICRON TECHNOLOGY INC·Filed 2022·Granted Jun 11, 2024·0 cites·20 claims
- 1469US12039189B2Idle mode temperature control for memory systemsMICRON TECHNOLOGY INC·Filed 2022·Granted Jul 16, 2024·0 cites·24 claims
- 1569US11886341B2Enhancement for activation and deactivation of memory address regionsMICRON TECHNOLOGY INC·Filed 2022·Granted Jan 30, 2024·0 cites·24 claims
- 1668US2025174288A1Setting switching for single-level cellsMICRON TECHNOLOGY INC·Filed 2024·Application pending·0 cites
- 1766US11928063B1Dynamic updates to logical-to-physical address translation table bitmapsMICRON TECHNOLOGY INC·Filed 2022·Granted Mar 12, 2024·0 cites·20 claims
- 1864US11556275B2Techniques for page line filler dataMICRON TECHNOLOGY INC·Filed 2021·Granted Jan 17, 2023·0 cites·25 claims
- 1964US11429528B2Split cache for address mapping dataMICRON TECHNOLOGY INC·Filed 2020·Granted Aug 30, 2022·0 cites·25 claims
- 2063US12183407B2Setting switching for single-level cellsMICRON TECHNOLOGY INC·Filed 2022·Granted Dec 31, 2024·0 cites·33 claims
- 2163US11657878B2Initialization techniques for memory devicesMICRON TECHNOLOGY INC·Filed 2022·Granted May 23, 2023·0 cites·20 claims
- 2262US9569129B2Controller to manage NAND memoriesMICRON TECHNOLOGY INC·Filed 2015·Granted Feb 14, 2017·1 cites·22 claims
- 2358US2024427699A1Referencing memory using portions of a split logical block addressMICRON TECHNOLOGY INC·Filed 2024·Application pending·0 cites
- 2458US2024394371A1Firmware verification using parity informationMICRON TECHNOLOGY INC·Filed 2024·Application pending·0 cites
- 2557US11379367B2Enhancement for activation and deactivation of memory address regionsMICRON TECHNOLOGY INC·Filed 2020·Granted Jul 5, 2022·0 cites·25 claims
- 2652US8694718B2Wear leveling for erasable memoriesIACULO MASSIMO·Filed 2008·Granted Apr 8, 2014·2 cites·14 claims
- 2750US10614899B2Program progress monitoring in a memory arrayMICRON TECHNOLOGY INC·Filed 2018·Granted Apr 7, 2020·0 cites·25 claims
- 2850US2024185926A1Writing user data into storage memoryMICRON TECHNOLOGY INC·Filed 2023·Application pending·0 cites
- 2943US2005021904A1Mass memory device based on a flash memory with multiple buffersST MICROELECTRONICS SRL·Filed 2004·Application pending·0 cites
- 3033US2012179860A1Suspension of memory operations for reduced read latency in memory arraysFALANGA FRANCESCO·Filed 2009·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →