Inventor · disambiguated record
Anand Raghunathan
Also filed as: RAGHUNATHAN ANAND
35 granted patents·11 pending applications·962 citations·filing 1995–2023
98Inventor score
Top patents by PatentIndex Score
46 records- 0197US10073733B1System and method for in-memory computingPURDUE RESEARCH FOUNDATION·Filed 2017·Granted Sep 11, 2018·64 cites·20 claims
- 0294US7383166B2Verification of scheduling in the presence of loops using uninterpreted symbolic simulationNEC CORP·Filed 2004·Granted Jun 3, 2008·86 cites·10 claims
- 0391US11681529B2Apparatuses, methods, and systems for access synchronization in a shared memoryINTEL CORP·Filed 2021·Granted Jun 20, 2023·2 cites·24 claims
- 0489US7134100B2Method and apparatus for efficient register-transfer level (RTL) power estimationNEC USA INC·Filed 2002·Granted Nov 7, 2006·59 cites·27 claims
- 0588US8286172B2Systems and methods for implementing best-effort parallel computing frameworksCHAKRADHAR SRIMAT·Filed 2009·Granted Oct 9, 2012·35 cites·17 claims
- 0687US6745160B1Verification of scheduling in the presence of loops using uninterpreted symbolic simulationNEC CORP·Filed 1999·Granted Jun 1, 2004·115 cites·33 claims
- 0785US6735744B2Power mode based macro-models for power estimation of electronic circuitsNEC CORP·Filed 2001·Granted May 11, 2004·42 cites·7 claims
- 0882US7278123B2System-level test architecture for delivery of compressed testsNEC LAB AMERICA INC·Filed 2004·Granted Oct 2, 2007·40 cites·42 claims
- 0981US9122523B2Automatic pipelining framework for heterogeneous parallel computing systemsNEC LAB AMERICA INC·Filed 2013·Granted Sep 1, 2015·9 cites·19 claims
- 1081US7529669B2Voice-based multimodal speaker authentication using adaptive training and applications thereofNEC LAB AMERICA INC·Filed 2007·Granted May 5, 2009·13 cites·8 claims
- 1181US6163876AMethod for verification of RTL generated from scheduled behavior in a high-level synthesis flowNEC USA INC·Filed 1998·Granted Dec 19, 2000·103 cites·8 claims
- 1276US6105139AController-based power management for low-power sequential circuitsNEC USA INC·Filed 1998·Granted Aug 15, 2000·75 cites·25 claims
- 1376US2024118892A1Apparatuses, methods, and systems for neural networksINTEL CORP·Filed 2023·Application pending·0 cites
- 1475US8225074B2Methods and systems for managing computations on a hybrid computing platform including a parallel acceleratorCHAKRADHAR SRIMAT T·Filed 2009·Granted Jul 17, 2012·12 cites·3 claims
- 1574US6877053B2High performance communication architecture for circuit designs using probabilistic allocation of resourcesNEC CORP·Filed 2001·Granted Apr 5, 2005·29 cites·20 claims
- 1673US11106464B2Apparatuses, methods, and systems for access synchronization in a shared memoryINTEL CORP·Filed 2016·Granted Aug 31, 2021·2 cites·24 claims
- 1773US10135849B2Securing medical devices through wireless monitoring and anomaly detectionJHA NIRAJ K·Filed 2013·Granted Nov 20, 2018·9 cites·21 claims
- 1873US6324679B1Register transfer level power optimization with emphasis on glitch analysis and reductionNIPPON ELECTRIC CO·Filed 1998·Granted Nov 27, 2001·62 cites·19 claims
- 1973US5726996AProcess for dynamic composition and test cycles reductionNEC USA INC·Filed 1995·Granted Mar 10, 1998·34 cites·3 claims
- 2072US6195786B1Constrained register sharing technique for low power VLSI designNEC USA INC·Filed 1998·Granted Feb 27, 2001·63 cites·7 claims
- 2170US11281429B2Ternary in-memory acceleratorPURDUE RESEARCH FOUNDATION·Filed 2019·Granted Mar 22, 2022·1 cites·11 claims
- 2269US10255186B2Approximate cache memoryPURDUE RESEARCH FOUNDATION·Filed 2017·Granted Apr 9, 2019·1 cites·20 claims
- 2369US7260809B2Power estimation employing cycle-accurate functional descriptionsNEC LAB AMERICA INC·Filed 2006·Granted Aug 21, 2007·4 cites·17 claims
- 2468US11966714B2Ternary in-memory acceleratorPURDUE RESEARCH FOUNDATION·Filed 2022·Granted Apr 23, 2024·0 cites·7 claims
- 2568US8762794B2Cross-layer system architecture designCHAKRADHAR SRIMAT·Filed 2011·Granted Jun 24, 2014·3 cites·5 claims
- 2667US2022050683A1Apparatuses, methods, and systems for neural networksINTEL CORP·Filed 2021·Application pending·0 cites
- 2763US7173906B2Flexible crossbar switching fabricNEC CORP·Filed 2002·Granted Feb 6, 2007·10 cites·16 claims
- 2862US6625781B2Multi-level power macromodelingNEC ELECTRONICS INC·Filed 2001·Granted Sep 23, 2003·8 cites·5 claims
- 2960US2021110581A1Tomographic reconstruction systemPURDUE RESEARCH FOUNDATION·Filed 2020·Application pending·0 cites
- 3058US11151040B2Approximate cache memoryPURDUE RESEARCH FOUNDATION·Filed 2019·Granted Oct 19, 2021·0 cites·17 claims
- 3158US6978425B1Methodology for the design of high-performance communication architectures for system-on-chips using communication architecture tunersUNIV CALIFORNIA·Filed 2000·Granted Dec 20, 2005·7 cites·8 claims
- 3257US6694488B1System for the design of high-performance communication architecture for system-on-chips using communication architecture tunersNEC CORP·Filed 2000·Granted Feb 17, 2004·6 cites·10 claims
- 3357US5831864ADesign tools for high-level synthesis of a low-power data pathUNIV PRINCETON·Filed 1996·Granted Nov 3, 1998·33 cites·15 claims
- 3455US10652237B2Continuous authentication system and method based on BioAuraMosenia Arsalan·Filed 2017·Granted May 12, 2020·1 cites·20 claims
- 3552US2019251712A1Tomographic reconstruction systemPURDUE RESEARCH FOUNDATION·Filed 2018·Application pending·0 cites
- 3648US10163232B2Tomographic reconstruction systemPURDUE RESEARCH FOUNDATION·Filed 2016·Granted Dec 25, 2018·0 cites·14 claims
- 3746US10722719B2Vibration-based secure side channel for medical devicesUNIV PRINCETON·Filed 2016·Granted Jul 28, 2020·0 cites·17 claims
- 3845US6308313B1Method for synthesis of common-case optimized circuits to improve performance and power dissipationNEC CORP·Filed 1999·Granted Oct 23, 2001·19 cites·9 claims
- 3945US2005204155A1Tamper resistant secure architectureNEC LAB AMERICA INC·Filed 2004·Application pending·0 cites
- 4043US6275969B1Common case optimized circuit structure for high-performance and low-power VLSI designsNEC USA INC·Filed 1999·Granted Aug 14, 2001·15 cites·8 claims
- 4143US2007101424A1Apparatus and Method for Improving Security of a Bus Based System Through Communication Architecture EnhancementsNEC LAB AMERICA INC·Filed 2006·Application pending·0 cites
- 4243US2003142818A1Techniques for efficient security processingNEC USA INC·Filed 2002·Application pending·0 cites
- 4342US2006080076A1System-level power estimation using heteregeneous power modelsNEC LAB AMERICA INC·Filed 2005·Application pending·0 cites
- 4441US2012084747A1Partitioned iterative convergance programming modelCHAKRADHAR SRIMAT·Filed 2011·Application pending·0 cites
- 4540US2006058994A1Power estimation through power emulationNEC LAB AMERICA INC·Filed 2005·Application pending·0 cites
- 4635US2017213002A1Safety-driven architecture for implantable and wearable medical devicesJHA NIRAJ K·Filed 2017·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →