Inventor · disambiguated record
Anand Seshadri
Also filed as: SESHADRI ANAND
34 granted patents·5 pending applications·314 citations·filing 1997–2024
97Inventor score
Top patents by PatentIndex Score
39 records- 0194US9741724B2SRAM well-tie with an uninterrupted grated first poly and first contact patterns in a bit cell arrayTEXAS INSTRUMENTS INC·Filed 2015·Granted Aug 22, 2017·26 cites·16 claims
- 0294US8325511B2Retain-till-accessed power saving mode in high-performance static memoriesSESHADRI ANAND·Filed 2010·Granted Dec 4, 2012·26 cites·31 claims
- 0393US8218376B2Reduced power consumption in retain-till-accessed static memoriesSESHADRI ANAND·Filed 2010·Granted Jul 10, 2012·22 cites·24 claims
- 0489US8560931B2Low power retention random access memory with error correction on wake-upSESHADRI ANAND·Filed 2012·Granted Oct 15, 2013·13 cites·23 claims
- 0585US6730950B1Local interconnect using the electrode of a ferroelectricTEXAS INSTRUMENTS INC·Filed 2003·Granted May 4, 2004·42 cites·7 claims
- 0683US11670390B2Re-programmable integrated circuit architecture and method of manufactureTEXAS INSTRUMENTS INC·Filed 2021·Granted Jun 6, 2023·1 cites·22 claims
- 0783US7133304B2Method and apparatus to reduce storage node disturbance in ferroelectric memoryTEXAS INSTRUMENTS INC·Filed 2004·Granted Nov 7, 2006·32 cites·25 claims
- 0882US8971138B2Method of screening static random access memory cells for positive bias temperature instabilitySESHADRI ANAND·Filed 2012·Granted Mar 3, 2015·8 cites·27 claims
- 0980US6980459B2Non-volatile SRAMTEXAS INSTRUMENTS INC·Filed 2002·Granted Dec 27, 2005·27 cites·10 claims
- 1077US10631248B2Mid-cycle adjustment of internal clock signal timingTEXAS INSTRUMENTS INC·Filed 2017·Granted Apr 21, 2020·2 cites·25 claims
- 1174US2025006283A1Re-programmable integrated circuit architecture and method of manufactureTEXAS INSTRUMENTS INC·Filed 2024·Application pending·0 cites
- 1272US8159863B26T SRAM cell with single sided writeHOUSTON THEODORE W·Filed 2010·Granted Apr 17, 2012·5 cites·20 claims
- 1371US6965520B1Delay system for generating control signals in ferroelectric memory devicesTEXAS INSTRUMENTS INC·Filed 2004·Granted Nov 15, 2005·22 cites·26 claims
- 1470US9576621B2Read-current and word line delay path tracking for sense amplifier enable timingTEXAS INSTRUMENTS INC·Filed 2013·Granted Feb 21, 2017·4 cites·17 claims
- 1569US7985990B2Transistor layout for manufacturing process controlTEXAS INSTRUMENTS INC·Filed 2009·Granted Jul 26, 2011·3 cites·32 claims
- 1669US7200027B2Ferroelectric memory reference generator systems using staging capacitorsTEXAS INSTRUMENTS INC·Filed 2005·Granted Apr 3, 2007·7 cites·21 claims
- 1768US8654562B2Static random access memory cell with single-sided buffer and asymmetric constructionDENG XIAOWEI·Filed 2012·Granted Feb 18, 2014·3 cites·5 claims
- 1867US8394681B2Transistor layout for manufacturing process controlPARIKH ASHESH·Filed 2010·Granted Mar 12, 2013·3 cites·4 claims
- 1967US7301795B2Accelerated low power fatigue testing of FRAMTEXAS INSTRUMENTS INC·Filed 2005·Granted Nov 27, 2007·6 cites·42 claims
- 2067US2023253060A1Re-programmable integrated circuit architecture and method of manufactureTEXAS INSTRUMENTS INC·Filed 2023·Application pending·0 cites
- 2165US8472229B2Array-based integrated circuit with reduced proximity effectsTEXAS INSTRUMENTS INC·Filed 2012·Granted Jun 25, 2013·1 cites·10 claims
- 2264US8472228B2Array-based integrated circuit with reduced proximity effectsDENG XIAOWEI·Filed 2010·Granted Jun 25, 2013·1 cites·19 claims
- 2363US9209195B2SRAM well-tie with an uninterrupted grated first poly and first contact patterns in a bit cell arrayTEXAS INSTRUMENTS INC·Filed 2013·Granted Dec 8, 2015·1 cites·10 claims
- 2463US8724375B2SRAM cell having an N-well biasTEXAS INSTRUMENTS INC·Filed 2013·Granted May 13, 2014·2 cites·12 claims
- 2563US8184474B2Asymmetric SRAM cell with split transistors on the strong sideSESHADRI ANAND·Filed 2010·Granted May 22, 2012·3 cites·20 claims
- 2662US6091114AMethod and apparatus for protecting gate oxide from process-induced charging effectsTEXAS INSTRUMENTS INC·Filed 1998·Granted Jul 18, 2000·22 cites·10 claims
- 2761US2025371848A1Systems and methods for generating synthetic edge case data for computer vision modelsNOBLIS INC·Filed 2024·Application pending·0 cites
- 2856US8301431B2Apparatus and method for accelerating simulations and designing integrated circuits and other systemsHERAGU KEERTHINARAYAN P·Filed 2008·Granted Oct 30, 2012·2 cites·20 claims
- 2955US8379434B2SRAM cell for single sided writeTEXAS INSTRUMENTS INC·Filed 2010·Granted Feb 19, 2013·1 cites·10 claims
- 3054US8891287B2SRAM cell having a p-well biasSESHADRI ANAND·Filed 2011·Granted Nov 18, 2014·1 cites·26 claims
- 3153US12150298B2eFUSE programming feedback circuits and methodsTEXAS INSTRUMENTS INC·Filed 2021·Granted Nov 19, 2024·0 cites·22 claims
- 3251US6348370B1Method to fabricate a self aligned source resistor in embedded flash memory applicationsTEXAS INSTRUMENTS INC·Filed 2000·Granted Feb 19, 2002·6 cites·5 claims
- 3350US5986314ADepletion mode MOS capacitor with patterned Vt implantsTEXAS INSTRUMENTS INC·Filed 1997·Granted Nov 16, 1999·11 cites·10 claims
- 3450US2025189314A1Methods and systems for processing sensor data for a plurality of vehiclesNOBLIS INC·Filed 2023·Application pending·0 cites
- 3549US6103561ADepletion mode MOS capacitor with patterned VT implantsTEXAS INSTRUMENTS INC·Filed 1999·Granted Aug 15, 2000·10 cites·6 claims
- 3642US8339839B2SRAM cell for single sided writeHOUSTON THEODORE W·Filed 2012·Granted Dec 25, 2012·0 cites·10 claims
- 3741US10629250B2SRAM cell having an n-well biasSESHADRI ANAND·Filed 2011·Granted Apr 21, 2020·0 cites·8 claims
- 3833US2012119824A1Bias voltage sourceSESHADRI ANAND·Filed 2011·Application pending·0 cites
- 3930US6078535ARedundancy arrangement for novel memory architectureTEXAS INSTRUMENTS INC·Filed 1998·Granted Jun 20, 2000·1 cites·27 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →