Inventor · disambiguated record
Andreas Täuber
Also filed as: TAEUBER ANDREAS · TAUBER ANDREAS
14 granted patents·1 pending application·63 citations·filing 2000–2007
89Inventor score
Top patents by PatentIndex Score
15 records- 0175US6946848B2Calibration configurationINFINEON TECHNOLOGIES AG·Filed 2003·Granted Sep 20, 2005·19 cites·17 claims
- 0261US6992940B1Semiconductor memory apparatus with variable contact connections, and a corresponding semiconductor apparatusINFINEON TECHNOLOGIES AG·Filed 2003·Granted Jan 31, 2006·12 cites·20 claims
- 0358US7372331B2Receiver circuitINFINEON TECHNOLOGIES AG·Filed 2006·Granted May 13, 2008·5 cites·13 claims
- 0455US6489759B1Standby voltage controller and voltage divider in a configuration for supplying voltages to an electronic circuitINFINEON TECHNOLOGIES AG·Filed 2000·Granted Dec 3, 2002·10 cites·8 claims
- 0554US6701473B2Electrical circuit and method for testing a circuit component of the electrical circuitINFINEON TECHNOLOGIES AG·Filed 2001·Granted Mar 2, 2004·5 cites·38 claims
- 0643US6922764B2Memory, processor system and method for performing write operations on a memory regionINFINEON TECHNOLOGIES AG·Filed 2002·Granted Jul 26, 2005·4 cites·12 claims
- 0743US6597200B2Circuit arrangement for scalable output driversINFINEON TECHNOLOGIES AG·Filed 2002·Granted Jul 22, 2003·2 cites·22 claims
- 0837US6646908B2Integrated memory chip with a dynamic memoryINFINEON TECHNOLOGIES AG·Filed 2002·Granted Nov 11, 2003·2 cites·4 claims
- 0937US6628553B2Data output interface, in particular for semiconductor memoriesINFINEON TECHNOLOGIES AG·Filed 2002·Granted Sep 30, 2003·2 cites·7 claims
- 1037US6438058B2Integrated circuit containing a number of subcircuitsINFINEON TECHNOLOGIES AG·Filed 2001·Granted Aug 20, 2002·2 cites·13 claims
- 1134US8026959B2Integrated circuit for receiving dataQIMONDA AG·Filed 2007·Granted Sep 27, 2011·0 cites·17 claims
- 1230US7177999B2Reading extended data burst from memoryINFINEON TECHNOLOGIES AG·Filed 2003·Granted Feb 13, 2007·0 cites·8 claims
- 1330US6707705B2Integrated dynamic memory device and method for operating an integrated dynamic memoryINFINEON TECHNOLOGIES AG·Filed 2002·Granted Mar 16, 2004·0 cites·5 claims
- 1430US2002199139A1Test configuration for a parallel functional testing of semiconductor memory modules and test methodFiled 2002·Application pending·0 cites
- 1529US6414886B2Integrated memory with interblock redundancyINFINEON TECHNOLOGIES AG·Filed 2001·Granted Jul 2, 2002·0 cites·5 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →