Inventor · disambiguated record
Arvind Krishna Sujeeth
Also filed as: SUJEETH ARVIND · SUJEETH ARVIND KRISHNA
20 granted patents·9 pending applications·59 citations·filing 2021–2025
93Inventor score
Files withSAMBANOVA SYSTEMS INC29
Top patents by PatentIndex Score
29 records- 0197US11250061B1Lossless tiling in convolution networks—read-modify-write in backward passSAMBANOVA SYSTEMS INC·Filed 2021·Granted Feb 15, 2022·11 cites·23 claims
- 0297US11195080B1Lossless tiling in convolution networks—tiling configurationSAMBANOVA SYSTEMS INC·Filed 2021·Granted Dec 7, 2021·16 cites·20 claims
- 0396US11232360B1Lossless tiling in convolution networks—weight gradient calculationSAMBANOVA SYSTEMS INC·Filed 2021·Granted Jan 25, 2022·18 cites·20 claims
- 0495US11227207B1Lossless tiling in convolution networks—section boundariesSAMBANOVA SYSTEMS INC·Filed 2021·Granted Jan 18, 2022·6 cites·20 claims
- 0594US11995529B2Lossless tiling in convolution networks—tiling configuration for a sequence of sections of a graphSAMBANOVA SYSTEMS INC·Filed 2021·Granted May 28, 2024·3 cites·19 claims
- 0694US11263170B1Lossless tiling in convolution networks—padding before tiling, location-based tiling, and zeroing-outSAMBANOVA SYSTEMS INC·Filed 2021·Granted Mar 1, 2022·3 cites·22 claims
- 0790US2025390460A1Sectioning a processing graph for an applicationSAMBANOVA SYSTEMS INC·Filed 2025·Application pending·0 cites
- 0885US12079156B2Lossless tiling in convolution networks—materialization of tensorsSAMBANOVA SYSTEMS INC·Filed 2021·Granted Sep 3, 2024·1 cites·16 claims
- 0985US11934343B2Lossless tiling in convolution networks-backward passSAMBANOVA SYSTEMS INC·Filed 2021·Granted Mar 19, 2024·1 cites·15 claims
- 1085US2025335392A1Estimating a Cost of Routing a Logical Edge onto a Reconfigurable ProcessorSAMBANOVA SYSTEMS INC·Filed 2025·Application pending·0 cites
- 1185US2025335393A1Routing Cost Estimation Tool for a Reconfigurable ProcessorSAMBANOVA SYSTEMS INC·Filed 2025·Application pending·0 cites
- 1283US2025307205A1Estimating a Cost of Placing and Routing a Logical Edge onto a Reconfigurable ProcessorSAMBANOVA SYSTEMS INC·Filed 2025·Application pending·0 cites
- 1382US2025315229A1Optimizing dataflow program execution on coarse-grained reconfigurable systemsSAMBANOVA SYSTEMS INC·Filed 2025·Application pending·0 cites
- 1481US12511252B2Lossless tiling in convolution networks—tiling configuration between two sectionsSAMBANOVA SYSTEMS INC·Filed 2023·Granted Dec 30, 2025·0 cites·20 claims
- 1580US2025190751A1Retiling a tensor after zero paddingSAMBANOVA SYSTEMS INC·Filed 2025·Application pending·0 cites
- 1680US2025190749A1Multiple tiling configurations in single processing graphSAMBANOVA SYSTEMS INC·Filed 2025·Application pending·0 cites
- 1780US2025190750A1Managing disparate tiling configurations in a coarse-grained reconfigurable architectureSAMBANOVA SYSTEMS INC·Filed 2025·Application pending·0 cites
- 1877US12436915B2Operating a cost estimation tool for placing and routing an operation unit graph on a reconfigurable processorSAMBANOVA SYSTEMS INC·Filed 2023·Granted Oct 7, 2025·0 cites·19 claims
- 1977US12411670B2Analysis assistant for determining execution inefficiencies in dataflow programsSAMBANOVA SYSTEMS INC·Filed 2023·Granted Sep 9, 2025·0 cites·20 claims
- 2077US12367022B2Method and system to determine execution inefficiencies in dataflow programsSAMBANOVA SYSTEMS INC·Filed 2023·Granted Jul 22, 2025·0 cites·20 claims
- 2177US12332836B2Estimating a scaled cost of implementing an operation unit graph on a reconfigurable processorSAMBANOVA SYSTEMS INC·Filed 2023·Granted Jun 17, 2025·0 cites·20 claims
- 2277US12321843B2Lossless tiling in convolution networks—data flow logicSAMBANOVA SYSTEMS INC·Filed 2022·Granted Jun 3, 2025·0 cites·20 claims
- 2377US12210953B2Lossless tiling in convolution networks—section cutsSAMBANOVA SYSTEMS INC·Filed 2022·Granted Jan 28, 2025·0 cites·27 claims
- 2477US12112250B2Lossless tiling in convolution networks—resetting overlap factor to zero at section boundariesSAMBANOVA SYSTEMS INC·Filed 2022·Granted Oct 8, 2024·0 cites·19 claims
- 2577US12001936B2Lossless tiling in convolution networks—graph metadata generationSAMBANOVA SYSTEMS INC·Filed 2022·Granted Jun 4, 2024·0 cites·22 claims
- 2673US12333283B2Iterative compilation to optimize translation in reconfigurable dataflow architecturesSAMBANOVA SYSTEMS INC·Filed 2023·Granted Jun 17, 2025·0 cites·20 claims
- 2771US12488218B2Lossless tiling in convolution networks—padding and re-tilling at section boundariesSAMBANOVA SYSTEMS INC·Filed 2021·Granted Dec 2, 2025·0 cites·20 claims
- 2866US2023315802A1Compiler optimization of dataflow applications using mixed integer equationsSAMBANOVA SYSTEMS INC·Filed 2023·Application pending·0 cites
- 2953US12340190B2Tensor checkpoint optimization in dataflow computing applicationsSAMBANOVA SYSTEMS INC·Filed 2023·Granted Jun 24, 2025·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →