Inventor · disambiguated record
Ashish B. Dixit
Also filed as: DIXIT ASHISH · DIXIT ASHISH B
13 granted patents·1,268 citations·filing 1989–2008
95Inventor score
Technology areasG06F
Top patents by PatentIndex Score
13 records- 0198US6477683B1Automated processor generation system for designing a configurable processor and method for the sameTENSILICA INC·Filed 1999·Granted Nov 5, 2002·437 cites·104 claims
- 0297US8006204B2Automated processor generation system for designing a configurable processor and method for the sameTENSILICA INC·Filed 2006·Granted Aug 23, 2011·70 cites·19 claims
- 0397US7020854B2Automated processor generation system for designing a configurable processor and method for the sameTENSILICA INC·Filed 2004·Granted Mar 28, 2006·152 cites·10 claims
- 0496US6760888B2Automated processor generation system for designing a configurable processor and method for the sameTENSILICA INC·Filed 2002·Granted Jul 6, 2004·148 cites·8 claims
- 0588US8924898B2System and method of designing instruction extensions to supplement an existing processor instruction set architectureKILLIAN EARL A·Filed 2008·Granted Dec 30, 2014·16 cites·21 claims
- 0682US6282633B1High data density RISC processorTENSILICA INC·Filed 1998·Granted Aug 28, 2001·104 cites·21 claims
- 0780US5204953AOne clock address pipelining in segmentation unitINTEL CORP·Filed 1989·Granted Apr 20, 1993·56 cites·1 claims
- 0875US5420992ABackward-compatible computer architecture with extended word size and address spaceSILICON GRAPHICS INC·Filed 1994·Granted May 30, 1995·65 cites·17 claims
- 0973US8875068B2System and method of customizing an existing processor design having an existing processor instruction set architecture with instruction extensionsKILLIAN EARL A·Filed 2008·Granted Oct 28, 2014·4 cites·20 claims
- 1073US5574877ATLB with two physical pages per virtual tagSILICON GRAPHICS INC·Filed 1992·Granted Nov 12, 1996·60 cites·8 claims
- 1173US5568630ABackward-compatible computer architecture with extended word size and address spaceSILICON GRAPHICS INC·Filed 1995·Granted Oct 22, 1996·65 cites·14 claims
- 1273US5408626AOne clock address pipelining in segmentation unitINTEL CORP·Filed 1993·Granted Apr 18, 1995·53 cites·13 claims
- 1362US5201043ASystem using both a supervisor level control bit and a user level control bit to enable/disable memory reference alignment checkingINTEL CORP·Filed 1992·Granted Apr 6, 1993·38 cites·10 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →