Inventor · disambiguated record
Ashish S. Gadagkar
Also filed as: GADAGKAR ASHISH · GADAGKAR ASHISH S
6 granted patents·192 citations·filing 1997–1998
86Inventor score
Technology areasG06F
Files withINTEL CORP6
Top patents by PatentIndex Score
6 records- 0172US6243781B1Avoiding deadlock by storing non-posted transactions in an auxiliary buffer when performing posted and non-posted bus transactions from an outbound pipeINTEL CORP·Filed 1998·Granted Jun 5, 2001·67 cites·14 claims
- 0259US6314472B1Abort of DRAM read ahead when PCI read multiple has endedINTEL CORP·Filed 1998·Granted Nov 6, 2001·34 cites·23 claims
- 0359US6049887AMethod and apparatus for propagating a signal between synchronous clock domains operating at a non-integer frequency ratioINTEL CORP·Filed 1997·Granted Apr 11, 2000·40 cites·29 claims
- 0451US5961649AMethod and apparatus for propagating a signal between synchronous clock domains operating at a non-integer frequency ratioINTEL CORP·Filed 1997·Granted Oct 5, 1999·28 cites·23 claims
- 0545US6202112B1Arbitration methods to avoid deadlock and livelock when performing transactions across a bridgeINTEL CORP·Filed 1998·Granted Mar 13, 2001·19 cites·33 claims
- 0631US6237055B1Avoiding livelock when performing a long stream of transactionsINTEL CORP·Filed 1998·Granted May 22, 2001·4 cites·21 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →