Inventor · disambiguated record
Asanga H. Perera
Also filed as: PERERA ASANGA H
22 granted patents·4 pending applications·871 citations·filing 1995–2025
96Inventor score
Top patents by PatentIndex Score
26 records- 0198US6362057B1Method for forming a semiconductor deviceMOTOROLA INC·Filed 1999·Granted Mar 26, 2002·313 cites·24 claims
- 0296US8901632B1Non-volatile memory (NVM) and high-K and metal gate integration using gate-last methodologyFREESCALE SEMICONDUCTOR INC·Filed 2013·Granted Dec 2, 2014·40 cites·18 claims
- 0394US9275864B2Method to form a polysilicon nanocrystal thin film storage bitcell within a high k metal gate platform technology using a gate last process to form transistor gatesFREESCALE SEMICONDUCTOR INC·Filed 2013·Granted Mar 1, 2016·19 cites·12 claims
- 0494US9082837B2Nonvolatile memory bitcell with inlaid high k metal select gateFREESCALE SEMICONDUCTOR INC·Filed 2013·Granted Jul 14, 2015·25 cites·19 claims
- 0594US8969940B1Method of gate strapping in split-gate memory cell with inlaid gateFREESCALE SEMICONDUCTOR INC·Filed 2013·Granted Mar 3, 2015·21 cites·20 claims
- 0693US8871598B1Non-volatile memory (NVM) and high-k and metal gate integration using gate-first methodologyPERERA ASANGA H·Filed 2013·Granted Oct 28, 2014·23 cites·20 claims
- 0791US5786263AMethod for forming a trench isolation structure in an integrated circuitMOTOROLA INC·Filed 1995·Granted Jul 28, 1998·149 cites·25 claims
- 0889US9142566B2Method of forming different voltage devices with high-K metal gateFREESCALE SEMICONDUCTOR INC·Filed 2013·Granted Sep 22, 2015·10 cites·8 claims
- 0988US8877585B1Non-volatile memory (NVM) cell, high voltage transistor, and high-K and metal gate transistor integrationPERERA ASANGA H·Filed 2013·Granted Nov 4, 2014·11 cites·20 claims
- 1088US5665202AMulti-step planarization process using polishing at two different pad pressuresMOTOROLA INC·Filed 1995·Granted Sep 9, 1997·103 cites·20 claims
- 1187US9368499B2Method of forming different voltage devices with high-k metal gateFREESCALE SEMICONDUCTOR INC·Filed 2015·Granted Jun 14, 2016·5 cites·11 claims
- 1287US9136129B2Non-volatile memory (NVM) and high-k and metal gate integration using gate-last methodologyFREESCALE SEMICONDUCTOR INC·Filed 2013·Granted Sep 15, 2015·10 cites·20 claims
- 1384US9129855B2Non-volatile memory (NVM) and high-k and metal gate integration using gate-first methodologyFREESCALE SEMICONDUCTOR INC·Filed 2013·Granted Sep 8, 2015·7 cites·18 claims
- 1484US6524931B1Method for forming a trench isolation structure in an integrated circuitMOTOROLA INC·Filed 1999·Granted Feb 25, 2003·83 cites·8 claims
- 1583US9082650B2Integrated split gate non-volatile memory cell and logic structurePERERA ASANGA H·Filed 2013·Granted Jul 14, 2015·7 cites·19 claims
- 1676US9136360B1Methods and structures for charge storage isolation in split-gate memory arraysPERERA ASANGA H·Filed 2014·Granted Sep 15, 2015·4 cites·18 claims
- 1775US2025301685A1Nanosheet transistors with reduced source/drain resistance and associated method of manufactureNXP USA INC·Filed 2025·Application pending·0 cites
- 1871US9318568B2Integration of a non-volatile memory (NVM) cell and a logic transistor and method thereforPERERA ASANGA H·Filed 2014·Granted Apr 19, 2016·2 cites·16 claims
- 1971US9105748B1Integration of a non-volatile memory (NVM) cell and a logic transistor and method thereforPERERA ASANGA H·Filed 2014·Granted Aug 11, 2015·3 cites·20 claims
- 2066US9252246B2Integrated split gate non-volatile memory cell and logic devicePERERA ASANGA H·Filed 2013·Granted Feb 2, 2016·2 cites·19 claims
- 2164US12363936B2Nanosheet transistors with reduced source/drain resistance and associated method of manufactureNXP USA INC·Filed 2022·Granted Jul 15, 2025·0 cites·14 claims
- 2260US5698893AStatic-random-access memory cell with trench transistor and enhanced stabilityMOTOROLA INC·Filed 1995·Granted Dec 16, 1997·34 cites·8 claims
- 2360US2025300064A1Capacitor formed in interconnect layerNXP USA INC·Filed 2024·Application pending·0 cites
- 2459US2025366153A1Integration of thick i/o oxide for nanosheet gate-all-around devicesNXP USA INC·Filed 2024·Application pending·0 cites
- 2557US2025157872A1Finfet with local heatsinking and method of manufacturing the sameNXP BV·Filed 2023·Application pending·0 cites
- 2643US9728410B2Split-gate non-volatile memory (NVM) cell and method thereforFREESCALE SEMICONDUCTOR INC·Filed 2014·Granted Aug 8, 2017·0 cites·14 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →