Inventor · disambiguated record
Atul V. Ghia
Also filed as: GHIA ATUL · GHIA ATUL V
42 granted patents·926 citations·filing 1994–2010
98Inventor score
Top patents by PatentIndex Score
42 records- 0196US7091890B1Multi-purpose source synchronous interface circuitryXILINX INC·Filed 2004·Granted Aug 15, 2006·107 cites·26 claims
- 0292US6617877B1Variable data width operation in multi-gigabit transceivers on a programmable logic deviceXILINX INC·Filed 2002·Granted Sep 9, 2003·77 cites·33 claims
- 0392US6366128B1Circuit for producing low-voltage differential signalsXILINX INC·Filed 2000·Granted Apr 2, 2002·74 cites·23 claims
- 0489US6218858B1Programmable input/output circuit for FPGA for use in TTL, GTL, GTLP, LVPECL and LVDS circuitsXILINX INC·Filed 1999·Granted Apr 17, 2001·75 cites·5 claims
- 0588US6836142B2Asymmetric bidirectional bus implemented using an I/O device with a digitally controlled impedanceXILINX INC·Filed 2002·Granted Dec 28, 2004·35 cites·10 claims
- 0686US6501677B1Configuration memory architecture for FPGAXILINX INC·Filed 2001·Granted Dec 31, 2002·29 cites·4 claims
- 0784US6985096B1Bimodal serial to parallel converter with bitslip controllerXILINX INC·Filed 2004·Granted Jan 10, 2006·27 cites·31 claims
- 0884US6222757B1Configuration memory architecture for FPGAXILINX INC·Filed 1998·Granted Apr 24, 2001·44 cites·1 claims
- 0982US6963219B1Programmable differential internal termination for a low voltage differential signal input or output bufferXILINX INC·Filed 2003·Granted Nov 8, 2005·37 cites·17 claims
- 1081US8410579B2Power distribution networkGHIA ATUL V·Filed 2010·Granted Apr 2, 2013·8 cites·20 claims
- 1180US7518401B2Differential clock tree in an integrated circuitXILINX INC·Filed 2006·Granted Apr 14, 2009·7 cites·15 claims
- 1279US7414430B2Programmable logic device having an embedded differential clock treeXILINX INC·Filed 2006·Granted Aug 19, 2008·7 cites·7 claims
- 1378US7759973B1Integrated circuit having embedded differential clock treeXILINX INC·Filed 2008·Granted Jul 20, 2010·6 cites·16 claims
- 1478US7187709B1High speed configurable transceiver architectureXILINX INC·Filed 2002·Granted Mar 6, 2007·27 cites·17 claims
- 1578US7099426B1Flexible channel bonding and clock correction operations on a multi-block data pathXILINX INC·Filed 2002·Granted Aug 29, 2006·27 cites·35 claims
- 1678US6911842B1Low jitter clock for a physical media access sublayer on a field programmable gate arrayXILINX INC·Filed 2002·Granted Jun 28, 2005·24 cites·58 claims
- 1777US7061283B1Differential clock driver circuitXILINX INC·Filed 2004·Granted Jun 13, 2006·23 cites·18 claims
- 1874US7551646B1Data alignment and deskewing moduleXILINX INC·Filed 2004·Granted Jun 23, 2009·11 cites·31 claims
- 1974US6531892B2Bias voltage generator usable with circuit for producing low-voltage differential signalsXILINX INC·Filed 2002·Granted Mar 11, 2003·14 cites·19 claims
- 2073US7617472B1Regional signal-distribution network for an integrated circuitXILINX INC·Filed 2008·Granted Nov 10, 2009·5 cites·13 claims
- 2172US7372299B2Differential clock tree in an integrated circuitXILINX INC·Filed 2006·Granted May 13, 2008·4 cites·20 claims
- 2272US7129765B2Differential clock tree in an integrated circuitXILINX INC·Filed 2004·Granted Oct 31, 2006·13 cites·14 claims
- 2372US6836168B1Line driver with programmable slew ratesXILINX INC·Filed 2002·Granted Dec 28, 2004·14 cites·21 claims
- 2471US7111220B1Network physical layer with embedded multi-standard CRC generatorXILINX INC·Filed 2002·Granted Sep 19, 2006·16 cites·45 claims
- 2570US7480361B1Phase lock detectorXILINX INC·Filed 2004·Granted Jan 20, 2009·16 cites·19 claims
- 2670US7126406B2Programmable logic device having an embedded differential clock treeXILINX INC·Filed 2004·Granted Oct 24, 2006·11 cites·22 claims
- 2770US6810458B1Method and circuit for hot swap protectionXILINX INC·Filed 2002·Granted Oct 26, 2004·15 cites·29 claims
- 2867US5883852AConfigurable SRAM for field programmable gate arrayDYNACHIP CORP·Filed 1998·Granted Mar 16, 1999·26 cites·6 claims
- 2965US7353487B1Regional signal-distribution network for an integrated circuitXILINX INC·Filed 2004·Granted Apr 1, 2008·9 cites·6 claims
- 3062US6960933B1Variable data width operation in multi-gigabit transceivers on a programmable logic deviceXILINX INC·Filed 2003·Granted Nov 1, 2005·6 cites·18 claims
- 3160US6101143ASRAM shutdown circuit for FPGA to conserve power when FPGA is not in useXILINX INC·Filed 1998·Granted Aug 8, 2000·19 cites·6 claims
- 3259US8030967B1Method and apparatus involving a receiver with a selectable performance characteristicXILINX INC·Filed 2009·Granted Oct 4, 2011·3 cites·9 claims
- 3357US7142033B2Differential clocking scheme in an integrated circuit having digital multiplexersXILINX INC·Filed 2004·Granted Nov 28, 2006·7 cites·20 claims
- 3452US5528541ACharge shared precharge scheme to reduce compare output delaysSONY CORP·Filed 1994·Granted Jun 18, 1996·22 cites·22 claims
- 3549US5515024AHigh performance dynamic compare circuitSONY CORP·Filed 1994·Granted May 7, 1996·19 cites·14 claims
- 3645US5459416ASense amplifier common mode dip filter circuit to avoid false missesSONY ELECTRONICS INC·Filed 1994·Granted Oct 17, 1995·10 cites·19 claims
- 3744US5940606ADuty cycle controller for clock signal to synchronous SRAM on FPGADYNACHIP CORP·Filed 1998·Granted Aug 17, 1999·17 cites·7 claims
- 3843US6000013AMethod and apparatus for connecting memory chips to form a cache memory by assigning each chip a unique identification characteristicSONY CORP·Filed 1996·Granted Dec 7, 1999·15 cites·13 claims
- 3937US5537355AScheme to test/repair multiple large RAM blocksSONY CORP·Filed 1994·Granted Jul 16, 1996·5 cites·9 claims
- 4036US5617563ADuty cycle independent tunable clockSONY CORP·Filed 1994·Granted Apr 1, 1997·7 cites·20 claims
- 4136US5577228ADigital circuit for performing multicycle addressing in a digital memorySONY CORP·Filed 1994·Granted Nov 19, 1996·5 cites·4 claims
- 4233US5502670ASingle cycle flush for RAM memorySONY CORP·Filed 1994·Granted Mar 26, 1996·3 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →