Inventor · disambiguated record
Atsushi Ogishima
Also filed as: OGISHIMA ATSUSHI
19 granted patents·4 pending applications·515 citations·filing 1992–2006
96Inventor score
Top patents by PatentIndex Score
23 records- 0196US6762449B2Semiconductor integrated circuit device and the process of manufacturing the same having poly-silicon plug, wiring trenches and bit lines formed in the wiring trenches having a width finer than a predetermined sizeHITACHI LTD·Filed 2000·Granted Jul 13, 2004·77 cites·17 claims
- 0290US5734188ASemiconductor integrated circuit, method of fabricating the same and apparatus for fabricating the sameHITACHI LTD·Filed 1996·Granted Mar 31, 1998·73 cites·13 claims
- 0389US6743673B2Semiconductor integrated circuitry and method for manufacturing the circuitryHITACHI LTD·Filed 2002·Granted Jun 1, 2004·64 cites·11 claims
- 0489US6503794B1Semiconductor integrated circuit device and method for manufacturing the sameHITACHI LTD·Filed 1998·Granted Jan 7, 2003·96 cites·13 claims
- 0587US6287914B1Method of forming a MISFET device with a bit line completely surrounded by dielectricHITACHI LTD·Filed 2000·Granted Sep 11, 2001·26 cites·9 claims
- 0684US6573170B2Process for multilayer wiring connections and bonding pad adhesion to dielectric in a semiconductor integrated circuit deviceHITACHI LTD·Filed 2000·Granted Jun 3, 2003·35 cites·12 claims
- 0774US6867092B2Semiconductor integrated circuit device and the process of manufacturing the same for reducing the size of a memory cell by making the width of a bit line than a predetermined minimum sizeHITACHI LTD·Filed 2001·Granted Mar 15, 2005·11 cites·12 claims
- 0873US5917211ASemiconductor integrated circuit, method of fabricating the same and apparatus for fabricating the sameHITACHI LTD·Filed 1997·Granted Jun 29, 1999·37 cites·11 claims
- 0965US5264712ASemiconductor integrated circuit, method of fabricating the same and apparatus for fabricating the sameHITACHI LTD·Filed 1992·Granted Nov 23, 1993·27 cites·10 claims
- 1064US7026679B2Semiconductor integrated circuit device and the process of manufacturing the same having poly-silicon plug, wiring trenches and bit lines formed in the wiring trenches having a width finer than a predetermined sizeHITACHI LTD·Filed 2004·Granted Apr 11, 2006·6 cites·14 claims
- 1159US6734479B1Semiconductor integrated circuit device and the method of producing the sameHITACHI LTD·Filed 1999·Granted May 11, 2004·25 cites·19 claims
- 1255US6720234B2Semiconductor integrated circuit device and method of manufacturing involving the scale-down width of shallow groove isolation using round processingHITACHI LTD·Filed 2003·Granted Apr 13, 2004·5 cites·28 claims
- 1351US6204184B1Method of manufacturing semiconductor devicesHITACHI LTD·Filed 1999·Granted Mar 20, 2001·12 cites·9 claims
- 1450US7081649B2Semiconductor integrated circuitry and method for manufacturing the circuitryHITACHI ULSI SYS CO LTD·Filed 2004·Granted Jul 25, 2006·6 cites·14 claims
- 1550US6562695B1Semiconductor integrated circuit device and method of manufacturing involving the scale-down width of shallow groove isolation using round processingHITACHI LTD·Filed 1999·Granted May 13, 2003·12 cites·35 claims
- 1642US7397104B2Semiconductor integrated circuit device and a method of manufacturing the sameELPIDA MEMORY INC·Filed 2004·Granted Jul 8, 2008·0 cites·13 claims
- 1742US6800888B2Semiconductor integrated circuitry and method for manufacturing the circuitryHITCHI LTD·Filed 2004·Granted Oct 5, 2004·3 cites·16 claims
- 1842US6498100B2Method of manufacturing semiconductor devicesHITACHI LTD·Filed 2001·Granted Dec 24, 2002·0 cites·10 claims
- 1941US6380085B2Method of manufacturing semiconductor devicesHITACHI LTD·Filed 2000·Granted Apr 30, 2002·0 cites·2 claims
- 2041US2007075396A1Semiconductor device and manufacturing method thereofELPIDA MEMORY INC·Filed 2006·Application pending·0 cites
- 2139US2004209431A1Semiconductor memory device and method of manufacturing the sameELPIDA MEMORY INC·Filed 2003·Application pending·0 cites
- 2236US2005073000A1Semiconductor memory device with less threshold variationFiled 2003·Application pending·0 cites
- 2335US2002003305A1Semiconductor integrated circuit device including an interlayer insulating film formed under a bonding pad and arranged to prevent peeling of the bonding padFiled 2001·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Atsushi Ogishima files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →