Inventor · disambiguated record
Barry J. Arnold
Also filed as: ARNOLD BARRY · ARNOLD BARRY J · ARNOLD BARRY JOSEPH
17 granted patents·2 pending applications·197 citations·filing 1994–2011
93Inventor score
Files withHEWLETT PACKARD DEVELOPMENT CO12HEWLETT PACKARD CO4FLEISCHMAN JAY1FLEISCHMAN JAY E1ZHOU DACHENG HENRY1
Top patents by PatentIndex Score
19 records- 0186US6560737B1Method for adding scan controllability and observability to domino CMOS with low area and delay overheadHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted May 6, 2003·36 cites·16 claims
- 0281US7202702B2Output buffer slew rate control using clock signalHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Apr 10, 2007·22 cites·24 claims
- 0375US6678817B1Method and apparatus for fetching instructions from the memory subsystem of a mixed architecture processor into a hardware emulation engineHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Jan 13, 2004·23 cites·1 claims
- 0473US5530706ANon-destructive sampling of internal states while operating at normal frequencyHEWLETT PACKARD CO·Filed 1995·Granted Jun 25, 1996·36 cites·4 claims
- 0571US5467026APseudo-NMOS logic circuits with negligible static current during quiescent current testingHEWLETT PACKARD CO·Filed 1994·Granted Nov 14, 1995·23 cites·2 claims
- 0670US7464284B2Systems and methods for driving data over a bus where the systems employ a bus clock that is derived from a system clock and a data clock designed to lead the bus clockHEWLETT PACKARD DEVELOPMENT CO·Filed 2005·Granted Dec 9, 2008·7 cites·17 claims
- 0769US6986087B2Method and apparatus for improving testability of I/O driver/receiversHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Jan 10, 2006·17 cites·5 claims
- 0862US6970011B2Partial termination voltage current shuntingHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Nov 29, 2005·6 cites·23 claims
- 0962US6377080B1Dynamic logic circuitHEWLETT PACKARD CO·Filed 2000·Granted Apr 23, 2002·10 cites·20 claims
- 1058US7386750B2Reduced bus turnaround time in a multiprocessor architectureHEWLETT PACKARD DEVELOPMENT CO·Filed 2005·Granted Jun 10, 2008·2 cites·19 claims
- 1158US7057415B2Output buffer compensation controlHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Jun 6, 2006·9 cites·26 claims
- 1249US7088130B2Partial termination voltage current shuntingHEWLETT PACKARD DEVELOPMENT CO·Filed 2005·Granted Aug 8, 2006·0 cites·20 claims
- 1345US7113000B2Bus agent having multiple reference levelsHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Sep 26, 2006·0 cites·25 claims
- 1444US7356674B2Method and apparatus for fetching instructions from the memory subsystem of a mixed architecture processor into a hardware emulation engineHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Apr 8, 2008·0 cites·15 claims
- 1543US7161379B2Shunted current reductionHEWLETT PACKARD DEVELOPMENT CO·Filed 2004·Granted Jan 9, 2007·0 cites·24 claims
- 1640US5856752ADriver circuit with precharge and active holdHEWLETT PACKARD CO·Filed 1996·Granted Jan 5, 1999·6 cites·3 claims
- 1739US8467489B2Data clock recovery system and method employing delayed data clock phase shiftingZHOU DACHENG HENRY·Filed 2005·Granted Jun 18, 2013·0 cites·36 claims
- 1837US2012005459A1Processor having increased performance and energy saving via move eliminationFLEISCHMAN JAY·Filed 2010·Application pending·0 cites
- 1932US2012191952A1Processor implementing scalar code optimizationFLEISCHMAN JAY E·Filed 2011·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →