Inventor · disambiguated record
Barbara J. Duffner
Also filed as: DUFFNER BARBARA · DUFFNER BARBARA J · DUFFNER BARBARA JEAN
10 granted patents·1 pending application·185 citations·filing 1997–2013
90Inventor score
Top patents by PatentIndex Score
11 records- 0189US6703956B1Technique for improved linearity of high-precision, low-current digital-to-analog convertersAGILENT TECHNOLOGIES INC·Filed 2003·Granted Mar 9, 2004·47 cites·14 claims
- 0280US6909316B2Variable delay circuit with high resolutionAGILENT TECHNOLOGIES INC·Filed 2003·Granted Jun 21, 2005·25 cites·6 claims
- 0376US8902693B2System and method for per-bit de-skew for datamask in a double data-rate memory device interfaceAVAGO TECHNOLOGIES GENERAL IP·Filed 2013·Granted Dec 2, 2014·6 cites·27 claims
- 0476US6008670ADifferential CMOS logic familyHEWLETT PACKARD CO·Filed 1997·Granted Dec 28, 1999·40 cites·5 claims
- 0573US8937846B2Write level training using dual frequencies in a double data-rate memory device interfaceAVAGO TECHNOLOGIES GENERAL IP·Filed 2013·Granted Jan 20, 2015·5 cites·20 claims
- 0670US6664851B1Selectable single mode or differential mode operation in a single amplifierAGILENT TECHNOLOGIES INC·Filed 2002·Granted Dec 16, 2003·16 cites·12 claims
- 0766US6950375B2Multi-phase clock time stampingAGILENT TECHNOLOGIES INC·Filed 2002·Granted Sep 27, 2005·10 cites·33 claims
- 0858US5999028ADifferential circuits with adjustable propagation timingHEWLETT PACKARD CO·Filed 1997·Granted Dec 7, 1999·20 cites·2 claims
- 0944US6819178B2Selectable single mode or differential mode operation in a single amplifierAGILENT TECHNOLOGIES INC·Filed 2003·Granted Nov 16, 2004·4 cites·13 claims
- 1044US5982827AMeans for virtual deskewing of high/intermediate/low DUT dataHEWLETT PACKARD CO·Filed 1997·Granted Nov 9, 1999·12 cites·19 claims
- 1130US2004090254A1Systems and methods for altering timing edges of an input signalFiled 2002·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →