Inventor · disambiguated record
Bei Chao Zhang
Also filed as: ZHANG BEI CHAO
24 granted patents·1 pending application·149 citations·filing 2001–2012
95Inventor score
Files withCHARTERED SEMICONDUCTOR MFG16GLOBALFOUNDRIES SG PTE LTD2SEAH BOON MENG2DU LUYING1HO VINCENT1
Top patents by PatentIndex Score
25 records- 0193US7524755B2Entire encapsulation of Cu interconnects using self-aligned CuSiN filmCHARTERED SEMICONDUCTOR MFG·Filed 2006·Granted Apr 28, 2009·37 cites·18 claims
- 0292US8358007B2Integrated circuit system employing low-k dielectrics and method of manufacture thereofGLOBALFOUNDRIES SG PTE LTD·Filed 2010·Granted Jan 22, 2013·18 cites·19 claims
- 0390US8177993B2Apparatus and methods for cleaning and drying of wafersSEAH BOON MENG·Filed 2006·Granted May 15, 2012·28 cites·14 claims
- 0476US7803704B2Reliable interconnectsCHARTERED SEMICONDUCTOR MFG·Filed 2008·Granted Sep 28, 2010·6 cites·20 claims
- 0575US8102054B2Reliable interconnectsZHANG BEI CHAO·Filed 2010·Granted Jan 24, 2012·5 cites·20 claims
- 0672US7993997B2Poly profile engineering to modulate spacer induced stress for device enhancementGLOBALFOUNDRIES SG PTE LTD·Filed 2007·Granted Aug 9, 2011·3 cites·24 claims
- 0771US9490165B2Reliable interconnect integration schemeDU LUYING·Filed 2010·Granted Nov 8, 2016·5 cites·21 claims
- 0871US8115276B2Integrated circuit system employing back end of line via techniquesZHANG SHAOQING·Filed 2008·Granted Feb 14, 2012·7 cites·20 claims
- 0965US7622403B2Semiconductor processing system with ultra low-K dielectricCHARTERED SEMICONDUCTOR MFG·Filed 2006·Granted Nov 24, 2009·2 cites·10 claims
- 1059US7781895B2Via electromigration improvement by changing the via bottom geometric profileCHARTERED SEMICONDUCTOR MFG·Filed 2009·Granted Aug 24, 2010·1 cites·12 claims
- 1159US7012022B2Self-patterning of photo-active dielectric materials for interconnect isolationCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted Mar 14, 2006·7 cites·34 claims
- 1258US6383922B1Thermal stability improvement of CoSi2 film by stuffing in titaniumCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted May 7, 2002·8 cites·21 claims
- 1355US7678586B2Structure and method to prevent charge damage from e-beam curing processCHARTERED SEMICONDUCTOR MFG·Filed 2005·Granted Mar 16, 2010·0 cites·22 claims
- 1452US9147654B2Integrated circuit system employing alternating conductive layersSHENG HAIFENG·Filed 2008·Granted Sep 29, 2015·1 cites·20 claims
- 1552US7947604B2Method for corrosion prevention during planarizationCHARTERED SEMICONDUCTOR MFG·Filed 2008·Granted May 24, 2011·0 cites·21 claims
- 1650US6995087B2Integrated circuit with simultaneous fabrication of dual damascene via and trenchCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Feb 7, 2006·4 cites·20 claims
- 1750US6517235B2Using refractory metal silicidation phase transition temperature points to control and/or calibrate RTP low temperature operationCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Feb 11, 2003·9 cites·25 claims
- 1849US6967156B2Method to fabricate aligned dual damascene openingsCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted Nov 22, 2005·3 cites·32 claims
- 1948US7691739B2Via electromigration improvement by changing the via bottom geometric profileCHARTERED SEMICONDUCTOR MFG·Filed 2006·Granted Apr 6, 2010·0 cites·12 claims
- 2047US7256136B2Self-patterning of photo-active dielectric materials for interconnect isolationCHARTERED SEMICONDUCTOR MFG·Filed 2006·Granted Aug 14, 2007·0 cites·22 claims
- 2146US7372156B2Method to fabricate aligned dual damascene openingsCHARTERED SEMICONDUCTOR MFG·Filed 2005·Granted May 13, 2008·0 cites·17 claims
- 2246US7276440B2Method of fabrication of a die oxide ringCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted Oct 2, 2007·2 cites·7 claims
- 2344US8519445B2Poly profile engineering to modulate spacer induced stress for device enhancementHO VINCENT·Filed 2011·Granted Aug 27, 2013·0 cites·20 claims
- 2444US7294241B2Method to form alpha phase Ta and its application to IC manufacturingCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted Nov 13, 2007·3 cites·26 claims
- 2544US2012255586A1Apparatus and methods for cleaning and drying of wafersSEAH BOON MENG·Filed 2012·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →