Inventor · disambiguated record
Bharat Daga
Also filed as: DAGA BHARAT · DAGA BHARAT K · DAGA BHARAT KUMAR
18 granted patents·3 pending applications·65 citations·filing 2005–2024
92Inventor score
Top patents by PatentIndex Score
21 records- 0192US11763183B2Compression for deep learning in case of sparse values mapped to non-zero valueINTEL CORP·Filed 2021·Granted Sep 19, 2023·2 cites·20 claims
- 0291US11544191B2Efficient hardware architecture for accelerating grouped convolutionsINTEL CORP·Filed 2020·Granted Jan 3, 2023·6 cites·20 claims
- 0390US12147914B2Compression for deep learning in case of sparse values mapped to non-zero valueINTEL CORP·Filed 2023·Granted Nov 19, 2024·1 cites·20 claims
- 0488US11080611B2Compression for deep learning in case of sparse values mapped to non-zero valueINTEL CORP·Filed 2017·Granted Aug 3, 2021·6 cites·21 claims
- 0588US10726583B2System and method of encoding and decoding feature maps and weights for a convolutional neural networkINTEL CORP·Filed 2016·Granted Jul 28, 2020·10 cites·20 claims
- 0687US12475054B1Dynamic cache allocation in artificial intelligence acceleratorHABANA LABS LTD·Filed 2024·Granted Nov 18, 2025·1 cites·20 claims
- 0785US10600147B2Efficient memory layout for enabling smart data compression in machine learning environmentsINTEL CORP·Filed 2017·Granted Mar 24, 2020·5 cites·24 claims
- 0884US10769526B2Machine learning accelerator architectureINTEL CORP·Filed 2018·Granted Sep 8, 2020·7 cites·22 claims
- 0975US8621290B2Memory system that supports probalistic component-failure correction with partial-component sparingDAGA BHARAT K·Filed 2010·Granted Dec 31, 2013·5 cites·20 claims
- 1072US10990648B2System and method for an optimized winograd convolution acceleratorINTEL CORP·Filed 2017·Granted Apr 27, 2021·3 cites·18 claims
- 1171US7609092B2Automatic phase-detection circuit for clocks with known ratiosSUN MICROSYSTEMS INC·Filed 2008·Granted Oct 27, 2009·6 cites·22 claims
- 1270US8756363B2Efficient storage of memory version dataRADOVIC ZORAN·Filed 2011·Granted Jun 17, 2014·3 cites·17 claims
- 1369US8335976B2Memory system that provides guaranteed component-failure correction with double-error correctionDAGA BHARAT K·Filed 2010·Granted Dec 18, 2012·3 cites·20 claims
- 1468US8255741B2Facilitating error detection and correction after a memory component failureCYPHER ROBERT E·Filed 2009·Granted Aug 28, 2012·6 cites·20 claims
- 1557US8516199B2Bandwidth-efficient directory-based coherence protocolCYPHER ROBERT E·Filed 2009·Granted Aug 20, 2013·1 cites·17 claims
- 1657US2022043884A1System and method for an optimized winograd convolution acceleratorINTEL CORP·Filed 2021·Application pending·0 cites
- 1752US8886898B2Efficient interleaving between a non-power-of-two number of entitiesCYPHER ROBERT E·Filed 2009·Granted Nov 11, 2014·0 cites·20 claims
- 1846US11640537B2Mechanism to perform non-linear functions in a machine learning acceleratorINTEL CORP·Filed 2019·Granted May 2, 2023·0 cites·16 claims
- 1946US2010077240A1Methods and apparatuses for reducing power consumption of fully-buffered dual inline memory modulesSUN MICROSYSTEMS INC·Filed 2008·Application pending·0 cites
- 2045US7627065B2Generating a clock crossing signal based on clock ratiosSUN MICROSYSTEMS INC·Filed 2005·Granted Dec 1, 2009·0 cites·20 claims
- 2135US2017286357A1Method, Apparatus And System For Communicating Between Multiple ProtocolsINTEL CORP·Filed 2016·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Bharat Daga files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →