Inventor · disambiguated record
Bing-Yue Tsui
Also filed as: TSUI BING-YUE
23 granted patents·9 pending applications·619 citations·filing 1990–2024
96Inventor score
Files withIND TECH RES INST9NATIONAL YANG MING CHIAO TUNG UNIV8UNIV NAT CHIAO TUNG5EPISIL TECHNOLOGIES INC4UNIV NATIONAL CHIAO TUNG2
Top patents by PatentIndex Score
32 records- 0194US5891799AMethod for making stacked and borderless via structures for multilevel metal interconnections on semiconductor substratesIND TECH RES INST·Filed 1997·Granted Apr 6, 1999·218 cites·19 claims
- 0293US6489204B1Save MOS deviceEPISIL TECHNOLOGIES INC·Filed 2001·Granted Dec 3, 2002·93 cites·18 claims
- 0390US8853824B1Enhanced tunnel field effect transistorUNIV NAT CHIAO TUNG·Filed 2013·Granted Oct 7, 2014·12 cites·7 claims
- 0484US12256559B2Source-body self-aligned method of a vertical double diffused metal oxide semiconductor field effect transistorNATIONAL YANG MING CHIAO TUNG UNIV·Filed 2022·Granted Mar 18, 2025·1 cites·16 claims
- 0582US6225211B1Method for making stacked and borderless via structures on semiconductor substrates for integrated circuitsIND TECH RES INST·Filed 1999·Granted May 1, 2001·72 cites·20 claims
- 0680US6759305B2Method for increasing the capacity of an integrated circuit deviceIND TECH RES INST·Filed 2002·Granted Jul 6, 2004·26 cites·15 claims
- 0775US5792699AMethod for reduction of reverse short channel effect in MOSFETIND TECH RES INST·Filed 1996·Granted Aug 11, 1998·48 cites·16 claims
- 0873US6303419B1Method for fabricating a BiCMOS device featuring twin wells and an N type epitaxial layerIND TECH RES INST·Filed 2000·Granted Oct 16, 2001·22 cites·29 claims
- 0971US6566752B2Bonding pad and method for manufacturing itIND TECH RES INST·Filed 2002·Granted May 20, 2003·16 cites·10 claims
- 1070US6426555B1Bonding pad and method for manufacturing itIND TECH RES INST·Filed 2000·Granted Jul 30, 2002·15 cites·9 claims
- 1169US5959309ASensor to monitor plasma induced charging damageIND TECH RES INST·Filed 1997·Granted Sep 28, 1999·39 cites·23 claims
- 1268US7115526B2Method for wet etching of high k thin film at low temperatureGRAND PLASTIC TECHNOLOGY CORP·Filed 2002·Granted Oct 3, 2006·15 cites·23 claims
- 1365US5702566AConductive photoresist to mitigate antenna effectIND TECH RES INST·Filed 1996·Granted Dec 30, 1997·30 cites·18 claims
- 1463US2025393286A1Fabrication method for forming a terraced gate oxide and gate oxide structure formed by using the sameNATIONAL YANG MING CHIAO TUNG UNIV·Filed 2024·Application pending·0 cites
- 1557US2025093240A1Method of identifying defects in crystalsGLOBALWAFERS CO LTD·Filed 2024·Application pending·0 cites
- 1652US12463039B2Method for reducing parasitic junction field effect transistor resistanceNATIONAL YANG MING CHIAO TUNG UNIV·Filed 2022·Granted Nov 4, 2025·0 cites·16 claims
- 1752US6835611B1Structure of metal oxide semiconductor field effect transistorUNIV NAT CHIAO TUNG·Filed 2003·Granted Dec 28, 2004·5 cites·7 claims
- 1851US2025194219A1Fabrication method for increasing bottom gate oxide thickness of a power transistor and trench gate structure formed by using the sameNATIONAL YANG MING CHIAO TUNG UNIV·Filed 2024·Application pending·0 cites
- 1950US7517759B2Method of fabricating metal oxide semiconductor deviceEPISIL TECHNOLOGIES INC·Filed 2007·Granted Apr 14, 2009·0 cites·5 claims
- 2050US7294550B2Method of fabricating metal oxide semiconductor deviceEPISIL TECHNOLOGIES INC·Filed 2004·Granted Nov 13, 2007·3 cites·7 claims
- 2149US7391079B2Metal oxide semiconductor deviceEPISIL TECHNOLOGIES INC·Filed 2006·Granted Jun 24, 2008·0 cites·6 claims
- 2248US2023361169A1Method for stabilizing breakdown voltages of floating guard ringNATIONAL YANG MING CHIAO TUNG UNIV·Filed 2022·Application pending·0 cites
- 2347US12507436B2Gate fabrication method of an U-metal-oxide-semiconductor field-effect transistor and trench gate structure formed thereofNATIONAL YANG MING CHIAO TUNG UNIV·Filed 2023·Granted Dec 23, 2025·0 cites·22 claims
- 2444US12408372B2Process method for fabricating a three-dimensional source contact structureNATIONAL YANG MING CHIAO TUNG UNIV·Filed 2023·Granted Sep 2, 2025·0 cites·22 claims
- 2541US11342417B2Semiconductor structure of trench transistors and manufacturing method thereofUNIV NATIONAL CHIAO TUNG·Filed 2020·Granted May 24, 2022·0 cites·8 claims
- 2641US2024096981A1Three-dimensional source contact structure and fabrication process method of making the sameNATIONAL YANG MING CHIAO TUNG UNIV·Filed 2023·Application pending·0 cites
- 2740US11538920B2Method for increasing an oxide thickness at trench corner of an U-shaped gate metal-oxide-semiconductor field-effect transistorUNIV NATIONAL CHIAO TUNG·Filed 2021·Granted Dec 27, 2022·0 cites·15 claims
- 2838US2006016786A1Method and apparatus for removing SiC or low k material filmTSUI BING-YUE·Filed 2004·Application pending·0 cites
- 2938US2006255405A1Fully-depleted SOI MOSFET device and process for fabricating the sameUNIV NAT CHIAO TUNG·Filed 2005·Application pending·0 cites
- 3034US2004080000A1Gate structure of metal oxide semiconductor field effect transistorUNIV NAT CHIAO TUNG·Filed 2002·Application pending·0 cites
- 3134US2003189226A1Structure of metal oxide semiconductor field effect transistorUNIV NAT CHIAO TUNG·Filed 2002·Application pending·0 cites
- 3229US5024954AMethod of improving high temperature stability of PTSI/SI structureNAT SCIENCE COUNCIL·Filed 1990·Granted Jun 18, 1991·4 cites·21 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →