Inventor · disambiguated record
Bor-Ru Sheu
Also filed as: SHEU BOR-RU
9 granted patents·1 pending application·91 citations·filing 1999–2003
88Inventor score
Files withWINBOND ELECTRONICS CORP7VANGUARD INT SEMICONDUCT CORP1WINBOND ELECTONICS CORP1WINDBOND ELECTRONICS CORP1
Top patents by PatentIndex Score
10 records- 0169US6352896B1Method of manufacturing DRAM capacitorWINBOND ELECTRONICS CORP·Filed 2000·Granted Mar 5, 2002·13 cites·26 claims
- 0262US6828219B2Stacked spacer structure and processWINBOND ELECTRONICS CORP·Filed 2002·Granted Dec 7, 2004·9 cites·24 claims
- 0360US6563161B2Memory-storage node and the method of fabricating the sameWINBOND ELECTRONICS CORP·Filed 2001·Granted May 13, 2003·9 cites·10 claims
- 0459US6248643B1Method of fabricating a self-aligned contactVANGUARD INT SEMICONDUCT CORP·Filed 1999·Granted Jun 19, 2001·25 cites·16 claims
- 0556US6776622B2Conductive contact structure and process for producing the sameWINBOND ELECTRONICS CORP·Filed 2002·Granted Aug 17, 2004·8 cites·18 claims
- 0656US6764863B2Memory-storage node and the method of fabricating the sameWINBOND ELECTONICS CORP·Filed 2003·Granted Jul 20, 2004·9 cites·9 claims
- 0749US6291355B1Method of fabricating a self-aligned contact openingWINDBOND ELECTRONICS CORP·Filed 1999·Granted Sep 18, 2001·16 cites·11 claims
- 0846US6762482B2Memory device with composite contact plug and method for manufacturing the sameWINBOND ELECTRONICS CORP·Filed 2003·Granted Jul 13, 2004·1 cites·15 claims
- 0940US6882002B2Non-volatile semiconductor memory device having a dielectric layer formed around and planar with a first stack's top surfaceWINBOND ELECTRONICS CORP·Filed 2003·Granted Apr 19, 2005·1 cites·11 claims
- 1033US2002109231A1Composite structure of storage node and method of fabrication thereofWINBOND ELECTRONICS CORP·Filed 2001·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →