Inventor · disambiguated record
Brenton F. Belmar
Also filed as: BELMAR BRENTON · BELMAR BRENTON F
23 granted patents·207 citations·filing 2003–2021
95Inventor score
Technology areasG06F
Top patents by PatentIndex Score
23 records- 0196US11074203B2Handling an input/output store instructionIBM·Filed 2020·Granted Jul 27, 2021·5 cites·20 claims
- 0296US7454548B2Managing input/output interruptions in non-dedicated interruption hardware environments, and methods thereforIBM·Filed 2007·Granted Nov 18, 2008·40 cites·10 claims
- 0396US7380041B2Managing input/output interruptions in non-dedicated interruption hardware environmentsIBM·Filed 2006·Granted May 27, 2008·48 cites·23 claims
- 0495US11163566B2Handling an input/output store instructionIBM·Filed 2020·Granted Nov 2, 2021·4 cites·20 claims
- 0595US11068266B2Handling an input/output store instructionIBM·Filed 2020·Granted Jul 20, 2021·4 cites·20 claims
- 0695US9286076B2Intra-instructional transaction abort handlingIBM·Filed 2014·Granted Mar 15, 2016·26 cites·14 claims
- 0794US10353759B2Facilitating transaction completion subsequent to repeated aborts of the transactionIBM·Filed 2018·Granted Jul 16, 2019·8 cites·20 claims
- 0893US9983915B2Facilitating transaction completion subsequent to repeated aborts of the transactionIBM·Filed 2015·Granted May 29, 2018·9 cites·18 claims
- 0992US11593107B2Handling an input/output store instructionIBM·Filed 2021·Granted Feb 28, 2023·2 cites·25 claims
- 1090US9442738B2Restricting processing within a processor to facilitate transaction completionIBM·Filed 2013·Granted Sep 13, 2016·11 cites·19 claims
- 1189US8478922B2Controlling a rate at which adapter interruption requests are processedBELMAR BRENTON F·Filed 2010·Granted Jul 2, 2013·15 cites·21 claims
- 1285US10903988B1Unique instruction identifier that identifies common instructions across different code releasesIBM·Filed 2019·Granted Jan 26, 2021·5 cites·19 claims
- 1384US11334503B2Handling an input/output store instructionIBM·Filed 2020·Granted May 17, 2022·2 cites·19 claims
- 1481US7543095B2Managing input/output interruptions in non-dedicated interruption hardware environmentsIBM·Filed 2008·Granted Jun 2, 2009·7 cites·2 claims
- 1581US7130949B2Managing input/output interruptions in non-dedicated interruption hardware environmentsIBM·Filed 2003·Granted Oct 31, 2006·21 cites·18 claims
- 1667US11579874B2Handling an input/output store instructionIBM·Filed 2021·Granted Feb 14, 2023·0 cites·25 claims
- 1766US11762659B2Handling an input/output store instructionIBM·Filed 2021·Granted Sep 19, 2023·0 cites·25 claims
- 1863US10983833B2Virtualized and synchronous access to hardware acceleratorsIBM·Filed 2019·Granted Apr 20, 2021·0 cites·20 claims
- 1959US10430246B2Virtualized and synchronous access to hardware acceleratorsIBM·Filed 2018·Granted Oct 1, 2019·0 cites·24 claims
- 2055US9367378B2Facilitating transaction completion subsequent to repeated aborts of the transactionIBM·Filed 2013·Granted Jun 14, 2016·0 cites·9 claims
- 2152US9740549B2Facilitating transaction completion subsequent to repeated aborts of the transactionBELMAR BRENTON F·Filed 2012·Granted Aug 22, 2017·0 cites·18 claims
- 2252US9442737B2Restricting processing within a processor to facilitate transaction completionALEXANDER KHARY J·Filed 2012·Granted Sep 13, 2016·0 cites·20 claims
- 2349US9311101B2Intra-instructional transaction abort handlingBELMAR BRENTON F·Filed 2012·Granted Apr 12, 2016·0 cites·7 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →