Inventor · disambiguated record
Brian D. Gerson
Also filed as: GERSON BRIAN · GERSON BRIAN D · GERSON BRIAN DONALD
10 granted patents·464 citations·filing 1994–2000
92Inventor score
Top patents by PatentIndex Score
10 records- 0189US6342790B1High-speed, adaptive IDDQ measurementPMC SIERRA INC·Filed 2000·Granted Jan 29, 2002·47 cites·12 claims
- 0287US5905386ACMOS SONET/ATM receiver suitable for use with pseudo ECL and TTL signaling environmentsPMC SIERRA LTD·Filed 1998·Granted May 18, 1999·53 cites·6 claims
- 0380US5512860AClock recovery phase locked loop control using clock difference detection and forced low frequency startupPMC SIERRA INC·Filed 1994·Granted Apr 30, 1996·103 cites·14 claims
- 0472US5835501ABuilt-in test scheme for a jitter tolerance test of a clock and data recovery unitPMC SIERRA LTD·Filed 1996·Granted Nov 10, 1998·83 cites·13 claims
- 0566US6104277APolysilicon defined diffused resistorPMC SIERRA LTD·Filed 1997·Granted Aug 15, 2000·27 cites·18 claims
- 0664US6188692B1Integrated user network interface device for interfacing between a sonet network and an ATM networkPMC SIERRA LTD·Filed 1998·Granted Feb 13, 2001·58 cites·38 claims
- 0760US5548230AHigh-speed CMOS pseudo-ECL output driverPMC SIERRA INC·Filed 1994·Granted Aug 20, 1996·42 cites·6 claims
- 0857US5734541ALow voltage silicon controlled rectifier structure for ESD input pad protection in CMOS IC'sPMC SIERRA INC·Filed 1996·Granted Mar 31, 1998·20 cites·3 claims
- 0956US5793225ACMOS SONET/ATM receiver suitable for use with pseudo ECL and TTL signaling environmentsPMC SIERRA INC·Filed 1996·Granted Aug 11, 1998·12 cites·6 claims
- 1044US6088369ALine coding technique for efficient transmission and delineation of encapsulated frames over high speed data linksPMC SIERRA LTD·Filed 1997·Granted Jul 11, 2000·19 cites·18 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →