Inventor · disambiguated record
Bruce C. Giamei
Also filed as: GIAMEI BRUCE · GIAMEI BRUCE C · GIAMEI BRUCE CONRAD
53 granted patents·7 pending applications·187 citations·filing 1997–2024
97Inventor score
Top patents by PatentIndex Score
60 records- 0195US8495341B2Instruction length based cracking for instruction of variable length storage operandsBUSABA FADI·Filed 2010·Granted Jul 23, 2013·47 cites·20 claims
- 0290US8195924B2Early instruction text based operand store compare reject avoidanceALEXANDER KHARY J·Filed 2011·Granted Jun 5, 2012·18 cites·12 claims
- 0389US10630312B1General-purpose processor instruction to perform compression/decompression operationsIBM·Filed 2019·Granted Apr 21, 2020·8 cites·20 claims
- 0489US8938605B2Instruction cracking based on machine stateBUSABA FADI·Filed 2010·Granted Jan 20, 2015·15 cites·19 claims
- 0586US10333548B1Efficient software closing of hardware-generated encoding contextIBM·Filed 2018·Granted Jun 25, 2019·5 cites·20 claims
- 0685US10831478B2Sort and merge instruction for a general-purpose processorIBM·Filed 2018·Granted Nov 10, 2020·3 cites·20 claims
- 0783US8645669B2Cracking destructively overlapping operands in variable length instructionsALEXANDER KHARY J·Filed 2010·Granted Feb 4, 2014·8 cites·24 claims
- 0883US8078843B2Facilitating processing in a computing environment using an extended drain instructionALEXANDER KHARY J·Filed 2008·Granted Dec 13, 2011·11 cites·18 claims
- 0982US9135005B2History and alignment based cracking for store multiple instructions for optimizing operand store compare penaltiesALEXANDER KHARY J·Filed 2010·Granted Sep 15, 2015·7 cites·20 claims
- 1081US10521351B2Temporarily suppressing processing of a restrained storage operand requestIBM·Filed 2017·Granted Dec 31, 2019·2 cites·16 claims
- 1178US8407453B2Facilitating processing in a computing environment using an extended drain instructionALEXANDER KHARY J·Filed 2011·Granted Mar 26, 2013·4 cites·18 claims
- 1277US7975130B2Method and system for early instruction text based operand store compare reject avoidanceIBM·Filed 2008·Granted Jul 5, 2011·8 cites·14 claims
- 1376US10956337B2Temporarily suppressing processing of a restrained storage operand requestIBM·Filed 2019·Granted Mar 23, 2021·1 cites·17 claims
- 1476US10944423B2Verifying the correctness of a deflate compression acceleratorIBM·Filed 2019·Granted Mar 9, 2021·2 cites·6 claims
- 1570US8464030B2Instruction cracking and issue shortening based on instruction base fields, index fields, operand fields, and various other instruction text bitsBUSABA FADI·Filed 2010·Granted Jun 11, 2013·3 cites·19 claims
- 1669US11366759B2Temporarily suppressing processing of a restrained storage operand requestIBM·Filed 2020·Granted Jun 21, 2022·0 cites·18 claims
- 1769US11281469B2Saving and restoring machine state between multiple executions of an instructionIBM·Filed 2020·Granted Mar 22, 2022·0 cites·20 claims
- 1869US10831497B2Compression/decompression instruction specifying a history buffer to be used in the compression/decompression of dataIBM·Filed 2019·Granted Nov 10, 2020·2 cites·20 claims
- 1969US10621090B2Facility for extending exclusive hold of a cache line in private cacheIBM·Filed 2017·Granted Apr 14, 2020·1 cites·25 claims
- 2067US10949212B2Saving and restoring machine state between multiple executions of an instructionIBM·Filed 2020·Granted Mar 16, 2021·0 cites·20 claims
- 2166US11031951B2Verifying the correctness of a deflate compression acceleratorIBM·Filed 2020·Granted Jun 8, 2021·0 cites·11 claims
- 2266US10985778B2Verifying the correctness of a deflate compression acceleratorIBM·Filed 2020·Granted Apr 20, 2021·0 cites·11 claims
- 2365US12430127B1Vector test decimal instruction for validity testingIBM·Filed 2024·Granted Sep 30, 2025·0 cites·24 claims
- 2465US6671794B1Address generation interlock detectionIBM·Filed 2000·Granted Dec 30, 2003·11 cites·25 claims
- 2563US11209992B2Detection of alteration of storage keys used to protect memoryIBM·Filed 2020·Granted Dec 28, 2021·0 cites·20 claims
- 2663US10831503B2Saving and restoring machine state between multiple executions of an instructionIBM·Filed 2018·Granted Nov 10, 2020·0 cites·20 claims
- 2762US11487547B2Extended asynchronous data mover functions compatibility indicationIBM·Filed 2021·Granted Nov 1, 2022·0 cites·16 claims
- 2862US11221850B2Sort and merge instruction for a general-purpose processorIBM·Filed 2020·Granted Jan 11, 2022·0 cites·20 claims
- 2962US7861064B2Method, system, and computer program product for selectively accelerating early instruction processingIBM·Filed 2008·Granted Dec 28, 2010·2 cites·12 claims
- 3060US10838631B2Detection of alteration of storage keys used to protect memoryIBM·Filed 2019·Granted Nov 17, 2020·0 cites·20 claims
- 3159US11061685B2Extended asynchronous data mover functions compatibility indicationIBM·Filed 2019·Granted Jul 13, 2021·0 cites·13 claims
- 3258US8250440B2Address generation checkingBUSABA FADI Y·Filed 2008·Granted Aug 21, 2012·1 cites·17 claims
- 3358US2025328346A1Instruction with a preserve sign controlIBM·Filed 2024·Application pending·0 cites
- 3458US2025370748A1Convert instruction with overflow result controlIBM·Filed 2024·Application pending·0 cites
- 3557US8201067B2Processor error checking for instruction dataBUSABA FADI Y·Filed 2008·Granted Jun 12, 2012·1 cites·18 claims
- 3657US2025307124A1Vector test zoned instruction for validity testingIBM·Filed 2024·Application pending·0 cites
- 3753US10601441B2Efficient software closing of hardware-generated encoding contextIBM·Filed 2019·Granted Mar 24, 2020·0 cites·20 claims
- 3852US10831502B2Migration of partially completed instructionsIBM·Filed 2018·Granted Nov 10, 2020·0 cites·20 claims
- 3950US11593275B2Operating system deactivation of storage block write protection absent quiescing of processorsIBM·Filed 2021·Granted Feb 28, 2023·0 cites·18 claims
- 4050US8176301B2Millicode assist instructions for millicode store access exception checkingFARRELL MARK S·Filed 2008·Granted May 8, 2012·0 cites·20 claims
- 4150US8090933B2Methods computer program products and systems for unifying program event recording for branches and stores in the same dataflowBUSABA FADI Y·Filed 2008·Granted Jan 3, 2012·0 cites·16 claims
- 4250US7966474B2System, method and computer program product for translating storage elementsIBM·Filed 2008·Granted Jun 21, 2011·0 cites·16 claims
- 4350US7913067B2Method and system for overlapping execution of instructions through non-uniform execution pipelines in an in-order processorIBM·Filed 2008·Granted Mar 22, 2011·0 cites·22 claims
- 4450US6751708B2Method for ensuring that a line is present in an instruction cacheIBM·Filed 2002·Granted Jun 15, 2004·1 cites·21 claims
- 4550US2013339666A1Special case register update without executionALEXANDER GREGORY W·Filed 2012·Application pending·0 cites
- 4649US8516228B2Supporting partial recycle in a pipelined microprocessorALEXANDER KHARY J·Filed 2008·Granted Aug 20, 2013·0 cites·16 claims
- 4749US5903479AMethod and system for executing denormalized numbersIBM·Filed 1997·Granted May 11, 1999·22 cites·14 claims
- 4848US11226839B2Maintaining compatibility for complex functions over multiple machine generationsIBM·Filed 2019·Granted Jan 18, 2022·0 cites·18 claims
- 4947US12393399B2Controlling storage accesses for merge operationsIBM·Filed 2018·Granted Aug 19, 2025·0 cites·25 claims
- 5047US12013791B2Reset dynamic address translation protection instructionIBM·Filed 2021·Granted Jun 18, 2024·0 cites·22 claims
Showing the top 50 of 60 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →