Inventor · disambiguated record
Brian S. Leibowitz
Also filed as: LEIBOWITZ BRIAN · LEIBOWITZ BRIAN S
156 granted patents·9 pending applications·1,136 citations·filing 2006–2025
99Inventor score
Top patents by PatentIndex Score
165 records- 0198US9565036B2Techniques for adjusting clock signals to compensate for noiseZERBE JARED·Filed 2010·Granted Feb 7, 2017·66 cites·26 claims
- 0298US9117496B2Memory device comprising programmable command-and-address and/or data interfacesRAMBUS INC·Filed 2013·Granted Aug 25, 2015·28 cites·29 claims
- 0398US8836394B2Method and apparatus for source-synchronous signalingZERBE JARED L·Filed 2012·Granted Sep 16, 2014·24 cites·21 claims
- 0498US8824222B2Fast-wake memoryWARE FREDERICK A·Filed 2011·Granted Sep 2, 2014·46 cites·20 claims
- 0597US11211105B2Memory device comprising programmable command-and-address and/or data interfacesRAMBUS INC·Filed 2020·Granted Dec 28, 2021·3 cites·20 claims
- 0697US10135647B2Methods and circuits for asymmetric distribution of channel equalization between devicesRAMBUS INC·Filed 2018·Granted Nov 20, 2018·10 cites·19 claims
- 0797US9304579B2Fast-wake memory controlRAMBUS INC·Filed 2015·Granted Apr 5, 2016·23 cites·20 claims
- 0897US9046909B2On-chip regulator with variable load compensationLEIBOWITZ BRIAN S·Filed 2012·Granted Jun 2, 2015·36 cites·15 claims
- 0997US8941420B2Low-latency, frequency-agile clock multiplierZERBE JARED L·Filed 2012·Granted Jan 27, 2015·19 cites·20 claims
- 1097US8929496B2Receiver with enhanced clock and data recoveryLEE HAE-CHANG·Filed 2009·Granted Jan 6, 2015·56 cites·33 claims
- 1197US8588280B2Asymmetric communication on shared linksOH KYUNG SUK·Filed 2008·Granted Nov 19, 2013·140 cites·22 claims
- 1297US8279976B2Signaling with superimposed differential-mode and common-mode signalsLIN QI·Filed 2008·Granted Oct 2, 2012·87 cites·24 claims
- 1396US9563597B2High capacity memory systems with inter-rank skew toleranceRAMBUS INC·Filed 2012·Granted Feb 7, 2017·22 cites·18 claims
- 1496US8989249B2High-speed signaling systems with adaptable pre-emphasis and equalizationZERBE JARED L·Filed 2011·Granted Mar 24, 2015·23 cites·34 claims
- 1596US7949041B2Methods and circuits for asymmetric distribution of channel equalization between devicesRAMBUS INC·Filed 2007·Granted May 24, 2011·28 cites·51 claims
- 1695US11525854B2Integrated circuit having receiver jitter tolerance (“JTOL”) measurementRAMBUS INC·Filed 2021·Granted Dec 13, 2022·2 cites·20 claims
- 1795US11277254B2Receiver with enhanced clock and data recoveryRAMBUS INC·Filed 2020·Granted Mar 15, 2022·3 cites·20 claims
- 1895US10466289B2Apparatus and method for controllably injecting jitter into recovered clock to simulate presence of jitter in input signalRAMBUS INC·Filed 2017·Granted Nov 5, 2019·5 cites·20 claims
- 1995US9768947B2Clock and data recovery having shared clock generatorRAMBUS INC·Filed 2016·Granted Sep 19, 2017·14 cites·22 claims
- 2095US9423441B2Integrated circuit having receiver jitter tolerance (“JTOL”) measurementLEE HAE-CHANG·Filed 2012·Granted Aug 23, 2016·10 cites·29 claims
- 2195US8824224B2Frequency-agile strobe window generationWARE FREDERICK A·Filed 2012·Granted Sep 2, 2014·23 cites·50 claims
- 2295US8198930B2Reducing power-supply-induced jitter in a clock-distribution circuitZERBE JARED·Filed 2010·Granted Jun 12, 2012·29 cites·41 claims
- 2394US8804397B2Integrated circuit having a clock deskew circuit that includes an injection-locked oscillatorALEKSIC MARKO·Filed 2012·Granted Aug 12, 2014·17 cites·21 claims
- 2493US10211841B2Method and apparatus for source-synchronous signalingRAMBUS INC·Filed 2017·Granted Feb 19, 2019·7 cites·15 claims
- 2593US10067519B2On-chip regulator with variable load compensationRAMBUS INC·Filed 2017·Granted Sep 4, 2018·11 cites·20 claims
- 2693US9843315B2Data transmission using delayed timing signalsRAMBUS INC·Filed 2012·Granted Dec 12, 2017·12 cites·14 claims
- 2793US8548110B2Receiver with clock recovery circuit and adaptive sample and equalizer timingLIN QI·Filed 2007·Granted Oct 1, 2013·21 cites·18 claims
- 2893US8289032B2Integrated circuit having receiver jitter tolerance (“JTOL”) measurementLEE HAE-CHANG·Filed 2008·Granted Oct 16, 2012·16 cites·22 claims
- 2992US11689351B2Hybrid serial receiver circuitAPPLE INC·Filed 2021·Granted Jun 27, 2023·2 cites·20 claims
- 3092US10560291B2High-speed signaling systems and methods with adaptable, continuous-time equalizationRAMBUS INC·Filed 2018·Granted Feb 11, 2020·5 cites·19 claims
- 3192US9569308B1Reduced-overhead error detection and correctionRAMBUS INC·Filed 2014·Granted Feb 14, 2017·12 cites·20 claims
- 3292US9553745B2High-speed signaling systems with adaptable pre-emphasis and equalizationZERBE JARED L·Filed 2012·Granted Jan 24, 2017·7 cites·33 claims
- 3392US9077575B2Methods and circuits for asymmetric distribution of channel equalization between devicesRAMBUS INC·Filed 2013·Granted Jul 7, 2015·7 cites·19 claims
- 3492US8311176B2Clock and data recovery employing piece-wise estimation on the derivative of the frequencyLEE HAE-CHANG·Filed 2007·Granted Nov 13, 2012·20 cites·26 claims
- 3591US11783879B2Memory device comprising programmable command-and-address and/or data interfacesRAMBUS INC·Filed 2021·Granted Oct 10, 2023·1 cites·20 claims
- 3691US11489703B2Edge based partial response equalizationRAMBUS INC·Filed 2020·Granted Nov 1, 2022·2 cites·20 claims
- 3791US10686632B2Methods and circuits for asymmetric distribution of channel equalization between devicesRAMBUS INC·Filed 2018·Granted Jun 16, 2020·3 cites·19 claims
- 3891US10192598B2Memory device comprising programmable command-and-address and/or data interfacesRAMBUS INC·Filed 2017·Granted Jan 29, 2019·4 cites·20 claims
- 3991US9818463B2Memory control component with inter-rank skew toleranceRAMBUS INC·Filed 2016·Granted Nov 14, 2017·8 cites·20 claims
- 4091US9734879B2Memory device comprising programmable command-and-address and/or data interfacesRAMBUS INC·Filed 2015·Granted Aug 15, 2017·5 cites·16 claims
- 4190US10770124B2Memory device comprising programmable command-and-address and/or data interfacesRAMBUS INC·Filed 2018·Granted Sep 8, 2020·3 cites·18 claims
- 4290US10521391B1Chip to chip interface with scalable bandwidthAPPLE INC·Filed 2018·Granted Dec 31, 2019·5 cites·20 claims
- 4390US10044530B2Edge based partial response equalizationRAMBUS INC·Filed 2016·Granted Aug 7, 2018·4 cites·19 claims
- 4490US9344074B2Low-latency, frequency-agile clock multiplierRAMBUS INC·Filed 2014·Granted May 17, 2016·6 cites·20 claims
- 4590US8477835B2Methods and circuits for asymmetric distribution of channel equalization between devicesZERBE JARED L·Filed 2011·Granted Jul 2, 2013·6 cites·31 claims
- 4690US7590175B2DFE margin test methods and circuits that decouple sample and feedback timingRAMBUS INC·Filed 2006·Granted Sep 15, 2009·15 cites·30 claims
- 4790US2025131953A1Memory device comprising programmable command-and-address and/or data interfacesRAMBUS INC·Filed 2024·Application pending·0 cites
- 4889US10608652B2Frequency-agile clock multiplierRAMBUS INC·Filed 2019·Granted Mar 31, 2020·4 cites·20 claims
- 4989US10050771B2Clock and data recovery having shared clock generatorRAMBUS INC·Filed 2017·Granted Aug 14, 2018·5 cites·20 claims
- 5089US9900189B2Methods and circuits for asymmetric distribution of channel equalization between devicesRAMBUS INC·Filed 2016·Granted Feb 20, 2018·3 cites·20 claims
Showing the top 50 of 165 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →