Inventor · disambiguated record
Brian Lessard
Also filed as: LESSARD BRIAN
3 granted patents·1 pending application·1 citations·filing 2012–2015
47Inventor score
Technology areasG06F
Top patents by PatentIndex Score
4 records- 0161US9870172B2Address collision avoidance in a memory deviceAVAGO TECHNOLOGIES GENERAL IP·Filed 2015·Granted Jan 16, 2018·1 cites·20 claims
- 0248US9274915B2Sideband logic for monitoring PCIe headersLSI CORP·Filed 2014·Granted Mar 1, 2016·0 cites·9 claims
- 0336US8943255B2Methods and structure for accounting for connection resets between peripheral component interconnect express bridges and host devicesWARD ROBERT E·Filed 2012·Granted Jan 27, 2015·0 cites·21 claims
- 0432US2017075827A1I/o command id collision avoidance in a memory deviceAVAGO TECHNOLOGIES GENERAL IP·Filed 2015·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →