Inventor · disambiguated record
Brian R. Mestan
Also filed as: MESTAN BRIAN R · MESTAN BRIAN ROBERT
29 granted patents·6 pending applications·168 citations·filing 2006–2024
95Inventor score
Technology areasG06F
Top patents by PatentIndex Score
35 records- 0196US11119767B1Atomic operation predictor to predict if an atomic operation will successfully complete and a store queue to selectively forward data based on the predictorAPPLE INC·Filed 2020·Granted Sep 14, 2021·6 cites·20 claims
- 0293US9069563B2Reducing store-hit-loads in an out-of-order processorKONIGSBURG BRIAN R·Filed 2011·Granted Jun 30, 2015·32 cites·20 claims
- 0393US7779232B2Method and apparatus for dynamically managing instruction buffer depths for non-predicted branchesIBM·Filed 2007·Granted Aug 17, 2010·56 cites·20 claims
- 0485US9489207B2Processor and method for partially flushing a dispatched instruction group including a mispredicted branchBURKY WILLIAM E·Filed 2009·Granted Nov 8, 2016·20 cites·16 claims
- 0584US8131976B2Tracking effective addresses in an out-of-order processorDOING RICHARD W·Filed 2009·Granted Mar 6, 2012·18 cites·22 claims
- 0681US12229557B2Atomic operation predictor to predict whether an atomic operation will complete successfullyAPPLE INC·Filed 2024·Granted Feb 18, 2025·0 cites·20 claims
- 0780US10725928B1Translation lookaside buffer invalidation by rangeAPPLE INC·Filed 2019·Granted Jul 28, 2020·4 cites·20 claims
- 0879US11615033B2Reducing translation lookaside buffer searches for splintered pagesAPPLE INC·Filed 2020·Granted Mar 28, 2023·1 cites·20 claims
- 0977US11099990B2Managing serial miss requests for load operations in a non-coherent memory systemAPPLE INC·Filed 2019·Granted Aug 24, 2021·2 cites·20 claims
- 1077US9052910B2Efficiency of short loop instruction fetchHALL RONALD·Filed 2008·Granted Jun 9, 2015·9 cites·21 claims
- 1176US9489204B2Method and apparatus for precalculating a direct branch partial target address during a misprediction correction processQUALCOMM INC·Filed 2013·Granted Nov 8, 2016·4 cites·30 claims
- 1272US12079140B2Reducing translation lookaside buffer searches for splintered pagesAPPLE INC·Filed 2023·Granted Sep 3, 2024·0 cites·20 claims
- 1371US8898667B2Dynamically manage applications on a processing systemDO LYDIA MAI·Filed 2008·Granted Nov 25, 2014·5 cites·17 claims
- 1471US8387050B2System and method to dynamically manage applications on a processing systemIBM·Filed 2008·Granted Feb 26, 2013·5 cites·18 claims
- 1570US11928467B2Atomic operation predictor to predict whether an atomic operation will complete successfullyAPPLE INC·Filed 2021·Granted Mar 12, 2024·0 cites·20 claims
- 1670US11720501B2Cache replacement based on traversal trackingAPPLE INC·Filed 2022·Granted Aug 8, 2023·0 cites·20 claims
- 1770US9189365B2Hardware-assisted program trace collection with selectable call-signature captureIBM·Filed 2013·Granted Nov 17, 2015·2 cites·12 claims
- 1869US12461677B2Reservation station with primary and secondary storage circuits for store operationsAPPLE INC·Filed 2024·Granted Nov 4, 2025·0 cites·20 claims
- 1966US8489866B2Branch trace history compressionMESTAN BRIAN ROBERT·Filed 2010·Granted Jul 16, 2013·3 cites·17 claims
- 2065US11429535B1Cache replacement based on traversal trackingAPPLE INC·Filed 2021·Granted Aug 30, 2022·0 cites·20 claims
- 2164US9395995B2Retrieving instructions of a single branch, backwards short loop from a virtual loop bufferHALL RONALD·Filed 2012·Granted Jul 19, 2016·1 cites·16 claims
- 2256US10909035B2Processing memory accesses while supporting a zero size cache in a cache hierarchyAPPLE INC·Filed 2019·Granted Feb 2, 2021·0 cites·20 claims
- 2355US9632788B2Buffering instructions of a single branch, backwards short loop within a virtual loop bufferIBM·Filed 2016·Granted Apr 25, 2017·0 cites·20 claims
- 2453US11675710B2Limiting translation lookaside buffer searches using active page sizeAPPLE INC·Filed 2020·Granted Jun 13, 2023·0 cites·20 claims
- 2552US11347514B2Content-addressable memory filtering based on microarchitectural stateAPPLE INC·Filed 2019·Granted May 31, 2022·0 cites·17 claims
- 2651US9772851B2Retrieving instructions of a single branch, backwards short loop from a local loop buffer or virtual loop bufferHALL RONALD·Filed 2007·Granted Sep 26, 2017·0 cites·18 claims
- 2751US2025315262A1Hierarchical Trace CacheAPPLE INC·Filed 2024·Application pending·0 cites
- 2850US11422946B2Translation lookaside buffer striping for efficient invalidation operationsAPPLE INC·Filed 2020·Granted Aug 23, 2022·0 cites·20 claims
- 2949US2010262813A1Detecting and Handling Short Forward Branch Conversion CandidatesIBM·Filed 2009·Application pending·0 cites
- 3049US2013055033A1Hardware-assisted program trace collection with selectable call-signature captureFRAZIER GILES R·Filed 2011·Application pending·0 cites
- 3148US9342432B2Hardware performance-monitoring facility usage after context swapsFRAZIER GILES R·Filed 2011·Granted May 17, 2016·0 cites·21 claims
- 3245US8868886B2Task switch immunized performance monitoringFRAZIER GILES R·Filed 2011·Granted Oct 21, 2014·0 cites·24 claims
- 3345US2008141046A1Partial data flow functional gating using structural or partial operand value informationIBM·Filed 2006·Application pending·0 cites
- 3439US2012005462A1Hardware Assist for Optimizing Code During ProcessingHALL RONALD P·Filed 2010·Application pending·0 cites
- 3534US2012084537A1System and method for execution based filtering of instructions of a processor to manage dynamic code optimizationINDUKURU VENKAT R·Filed 2010·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →