Inventor · disambiguated record
Brandon M. Rawlings
Also filed as: RAWLINGS BRANDON · RAWLINGS BRANDON M
31 granted patents·18 pending applications·40 citations·filing 2014–2023
94Inventor score
Top patents by PatentIndex Score
49 records- 0196US11527501B1Sacrificial redistribution layer in microelectronic assemblies having direct bondingINTEL CORP·Filed 2020·Granted Dec 13, 2022·7 cites·11 claims
- 0291US11133263B2High-density interconnects for integrated circuit packagesINTEL CORP·Filed 2019·Granted Sep 28, 2021·6 cites·22 claims
- 0390US10452571B2Microelectronic package communication using radio interfaces connected through waveguidesINTEL CORP·Filed 2015·Granted Oct 22, 2019·8 cites·16 claims
- 0487US10187998B2Zero-misalignment via-pad structuresINTEL CORP·Filed 2017·Granted Jan 22, 2019·4 cites·10 claims
- 0585US9713264B2Zero-misalignment via-pad structuresINTEL CORP·Filed 2014·Granted Jul 18, 2017·5 cites·11 claims
- 0681US10263312B2Plurality of dielectric waveguides including dielectric waveguide cores for connecting first and second server boardsINTEL CORP·Filed 2016·Granted Apr 16, 2019·3 cites·22 claims
- 0776US10998272B2Organic interposers for integrated circuit packagesINTEL CORP·Filed 2019·Granted May 4, 2021·2 cites·25 claims
- 0875US11394094B2Waveguide connector having a curved array of waveguides configured to connect a package to excitation elementsINTEL CORP·Filed 2016·Granted Jul 19, 2022·2 cites·19 claims
- 0972US10476545B2Communication between integrated circuit packages using a millimeter-wave wireless radio fabricINTEL CORP·Filed 2015·Granted Nov 12, 2019·2 cites·20 claims
- 1069US12002745B2High performance integrated RF passives using dual lithography processINTEL CORP·Filed 2021·Granted Jun 4, 2024·0 cites·5 claims
- 1169US11664303B2Interconnection structure fabrication using grayscale lithographyINTEL CORP·Filed 2021·Granted May 30, 2023·0 cites·20 claims
- 1269US10249925B2Dielectric waveguide bundle including a supporting feature for connecting first and second server boardsINTEL CORP·Filed 2016·Granted Apr 2, 2019·1 cites·22 claims
- 1366US12183961B2Methods for conductively coating millimeter waveguidesINTEL CORP·Filed 2021·Granted Dec 31, 2024·0 cites·18 claims
- 1466US11749628B2Sacrificial redistribution layer in microelectronic assemblies having direct bondingINTEL CORP·Filed 2022·Granted Sep 5, 2023·0 cites·15 claims
- 1565US11694951B2Zero-misalignment two-via structuresINTEL CORP·Filed 2021·Granted Jul 4, 2023·0 cites·21 claims
- 1663US12205902B2High-density interconnects for integrated circuit packagesINTEL CORP·Filed 2021·Granted Jan 21, 2025·0 cites·20 claims
- 1762US10645813B2Zero-misalignment via-pad structuresINTEL CORP·Filed 2018·Granted May 5, 2020·0 cites·11 claims
- 1858US11101205B2Interconnection structure fabrication using grayscale lithographyINTEL CORP·Filed 2019·Granted Aug 24, 2021·0 cites·8 claims
- 1958US10593636B2Platform with thermally stable wireless interconnectsINTEL CORP·Filed 2018·Granted Mar 17, 2020·0 cites·20 claims
- 2056US11095012B2Methods for conductively coating millimeter waveguidesINTEL CORP·Filed 2016·Granted Aug 17, 2021·0 cites·12 claims
- 2156US2025006695A1Packaging architecture including compensation layers for wafer-scale known-good-die to known-good-die hybrid bondingINTEL CORP·Filed 2023·Application pending·0 cites
- 2256US2025112077A1Architectures for facilitating bonding in wafer-level selective transfersINTEL CORP·Filed 2023·Application pending·0 cites
- 2356US2025112196A1Selective transfer of thermal management diesINTEL CORP·Filed 2023·Application pending·0 cites
- 2456US2025112218A1Selective layer transfer process improvementsINTEL CORP·Filed 2023·Application pending·0 cites
- 2556US2025105046A1Selective layer transferINTEL CORP·Filed 2023·Application pending·0 cites
- 2655US11222836B2Zero-misalignment two-via structuresINTEL CORP·Filed 2017·Granted Jan 11, 2022·0 cites·25 claims
- 2752US11024933B2Waveguide comprising an extruded dielectric waveguide core that is coextruded with an outer conductive layerINTEL CORP·Filed 2016·Granted Jun 1, 2021·0 cites·23 claims
- 2851US11031666B2Waveguide comprising a dielectric waveguide core surrounded by a conductive layer, where the core includes multiple spaces void of dielectricINTEL CORP·Filed 2016·Granted Jun 8, 2021·0 cites·13 claims
- 2951US2023207407A1Plate-up hybrid structures using modified glass patterning processesINTEL CORP·Filed 2021·Application pending·0 cites
- 3051US2023198058A1Embedded batteries within glass cores of package substratesINTEL CORP·Filed 2021·Application pending·0 cites
- 3151US2023207408A1Suspended structures in glass using modified glass patterning processesINTEL CORP·Filed 2021·Application pending·0 cites
- 3251US2023208010A13d arrayed glass-based mmwave and thz structuresINTEL CORP·Filed 2021·Application pending·0 cites
- 3351US2023197620A1Methods, systems, apparatus, and articles of manufacture for integrated circuit package substrates with high aspect ratio through glass viasINTEL CORP·Filed 2021·Application pending·0 cites
- 3451US2023187362A1Packaging architecture with patterned through-dielectric vias and redistribution layersINTEL CORP·Filed 2021·Application pending·0 cites
- 3550US10595410B2Non-planar on-package via capacitorINTEL CORP·Filed 2016·Granted Mar 17, 2020·0 cites·17 claims
- 3650US2023207404A1Coaxial inductors fabricated through a drill-less via processKAMGAING TELESPHOR·Filed 2021·Application pending·0 cites
- 3750US2023207492A1Coaxial inductor with plated high resistivity and high permeability magnetic materialALEKSOV ALEKSANDAR·Filed 2021·Application pending·0 cites
- 3850US2023095654A1Conformal power delivery structuresINTEL CORP·Filed 2021·Application pending·0 cites
- 3950US2023197592A1Power delivery techniques for glass substrate with high density signal viasINTEL CORP·Filed 2021·Application pending·0 cites
- 4049US11227825B2High performance integrated RF passives using dual lithography processINTEL CORP·Filed 2015·Granted Jan 18, 2022·0 cites·9 claims
- 4149US10083923B2Platform with thermally stable wireless interconnectsINTEL CORP·Filed 2015·Granted Sep 25, 2018·0 cites·24 claims
- 4249US2023197646A1Low loss microstrip and stripline routing with blind trench vias for high speed signaling on a glass coreINTEL CORP·Filed 2021·Application pending·0 cites
- 4348US11502037B2Zero-misalignment two-via structures using photoimageable dielectric, buildup film, and electrolytic platingINTEL CORP·Filed 2017·Granted Nov 15, 2022·0 cites·25 claims
- 4447US11460499B2Dual sided thermal management solutions for integrated circuit packagesINTEL CORP·Filed 2019·Granted Oct 4, 2022·0 cites·10 claims
- 4545US11328996B2Zero-misalignment two-via structures using photoimageable dielectric film buildup film, and transparent substrate with electroless platingINTEL CORP·Filed 2017·Granted May 10, 2022·0 cites·22 claims
- 4645US10950919B2System comprising first and second servers interconnected by a plurality of joined waveguide sectionsINTEL CORP·Filed 2016·Granted Mar 16, 2021·0 cites·21 claims
- 4741US10381291B2Lithographacally defined vias for organic package substrate scalingINTEL CORP·Filed 2015·Granted Aug 13, 2019·0 cites·19 claims
- 4838US2019393118A1Semiconductor package with sealed thermal interface cavity with low thermal resistance liquid thermal interface materialINTEL CORP·Filed 2018·Application pending·0 cites
- 4934US2018212306A1Antennas for platform level wireless interconnectsINTEL CORP·Filed 2015·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →