Inventor · disambiguated record
Bradley A. Sharpe-Geisler
Also filed as: SHARPE-GEISLER BRADLEY · SHARPE-GEISLER BRADLEY A
101 granted patents·4 pending applications·3,867 citations·filing 1986–2025
99Inventor score
Files withADVANCED MICRO DEVICES INC36VANTIS CORP35LATTICE SEMICONDUCTOR CORP32MONOLITHIC MEMORIES INC1SENSOR SCIENCE1
Top patents by PatentIndex Score
105 records- 0199US7028281B1FPGA with register-intensive architectureLATTICE SEMICONDUCTOR CORP·Filed 2002·Granted Apr 11, 2006·261 cites·12 claims
- 0298US6275064B1Symmetrical, extended and fast direct connections between variable grain blocks in FPGA integrated circuitsVANTIS CORP·Filed 1997·Granted Aug 14, 2001·218 cites·28 claims
- 0397US6249144B1Methods for configuring FPGA's having variable grain components for providing time-shared access to interconnect resourcesVANTIS CORP·Filed 2000·Granted Jun 19, 2001·67 cites·2 claims
- 0497US6130551ASynthesis-friendly FPGA architecture with variable length and variable timing interconnectVANTIS CORP·Filed 1998·Granted Oct 10, 2000·138 cites·26 claims
- 0596US6380759B1Variable grain architecture for FPGA integrated circuitsVANTIS CORP·Filed 2000·Granted Apr 30, 2002·64 cites·38 claims
- 0696US6163168AEfficient interconnect network for use in FPGA device having variable grain architectureVANTIS CORP·Filed 1998·Granted Dec 19, 2000·154 cites·31 claims
- 0796US6097212AVariable grain architecture for FPGA integrated circuitsLATTICE SEMICONDUCTOR CORP·Filed 1997·Granted Aug 1, 2000·105 cites·112 claims
- 0896US6031365ABand gap reference using a low voltage power supplyVANTIS CORP·Filed 1999·Granted Feb 29, 2000·99 cites·17 claims
- 0996US5811987ABlock clock and initialization circuit for a complex high density PLDADVANCED MICRO DEVICES INC·Filed 1996·Granted Sep 22, 1998·142 cites·50 claims
- 1095US6181163B1FPGA integrated circuit having embedded SRAM memory blocks and interconnect channel for broadcasting address and control signalsVANTIS CORP·Filed 1999·Granted Jan 30, 2001·142 cites·17 claims
- 1195US5521529AVery high-density complex programmable logic devices with a multi-tiered hierarchical switch matrix and optimized flexible logic allocationADVANCED MICRO DEVICES INC·Filed 1995·Granted May 28, 1996·105 cites·55 claims
- 1294US6590415B2Methods for configuring FPGA's having variable grain components for providing time-shared access to interconnect resourcesLATTICE SEMICONDUCTOR CORP·Filed 2001·Granted Jul 8, 2003·62 cites·13 claims
- 1394US5818254AMulti-tiered hierarchical high speed switch matrix structure for very high-density complex programmable logic devicesADVANCED MICRO DEVICES INC·Filed 1995·Granted Oct 6, 1998·108 cites·41 claims
- 1493US6725442B1Scalable and parallel processing methods and structures for testing configurable interconnect network in FPGA deviceLATTICE SEMICONDUCTOR CORP·Filed 2002·Granted Apr 20, 2004·93 cites·14 claims
- 1593US6216257B1FPGA device and method that includes a variable grain function architecture for implementing configuration logic blocks and a complimentary variable length interconnect architecture for providing configurable routing between configuration logic blocksVANTIS CORP·Filed 2000·Granted Apr 10, 2001·82 cites·10 claims
- 1692US5646901ACMOS memory cell with tunneling during program and erase through the NMOS and PMOS transistors and a pass gate separating the NMOS and PMOS transistorsADVANCED MICRO DEVICES INC·Filed 1996·Granted Jul 8, 1997·102 cites·13 claims
- 1790US6919736B1Field programmable gate array having embedded memory with configurable depth and widthLATTICE SEMICONDUCTOR CORP·Filed 2003·Granted Jul 19, 2005·42 cites·13 claims
- 1890US6470485B1Scalable and parallel processing methods and structures for testing configurable interconnect network in FPGA deviceLATTICE SEMICONDUCTOR CORP·Filed 2000·Granted Oct 22, 2002·59 cites·17 claims
- 1990US5905385AMemory bits used to couple look up table inputs to facilitate increased availability to routing resources particularly for variable sized look up tables for a field programmable gate array (FPGA)ADVANCED MICRO DEVICES INC·Filed 1997·Granted May 18, 1999·69 cites·8 claims
- 2089US10466738B2Low-speed bus time stamp methods and circuitryLATTICE SEMICONDUCTOR CORP·Filed 2016·Granted Nov 5, 2019·5 cites·26 claims
- 2189US5781030AProgrammable uniform symmetrical distribution logic allocator for a high-density complex PLDADVANCED MICRO DEVICES INC·Filed 1995·Granted Jul 14, 1998·64 cites·7 claims
- 2289US5723984AField programmable gate array (FPGA) with interconnect encodingADVANCED MICRO DEVICES INC·Filed 1996·Granted Mar 3, 1998·61 cites·12 claims
- 2389US5719516ALock generator circuit for use with a dual edge register that provides a separate enable for each use of an input clock signalADVANCED MICRO DEVICES INC·Filed 1995·Granted Feb 17, 1998·68 cites·7 claims
- 2489US5589782AMacrocell and clock signal allocation circuit for a programmable logic device (PLD) enabling PLD resources to provide multiple functionsADVANCED MICRO DEVICES INC·Filed 1995·Granted Dec 31, 1996·58 cites·36 claims
- 2588US6621298B2Variable grain architecture for FPGA integrated circuitsLATTICE SEMICONDUCTOR CORP·Filed 2002·Granted Sep 16, 2003·25 cites·20 claims
- 2688US6154051ATileable and compact layout for super variable grain blocks within FPGA deviceVANTIS CORP·Filed 1998·Granted Nov 28, 2000·75 cites·22 claims
- 2788US4740485AMethod for forming a fuseMONOLITHIC MEMORIES INC·Filed 1986·Granted Apr 26, 1988·81 cites·6 claims
- 2887US6351157B1Output buffer for making a high voltage (5.0 volt) compatible input/output in a low voltage (2.5 volt) semiconductor processVANTIS CORP·Filed 2000·Granted Feb 26, 2002·34 cites·9 claims
- 2987US6127843ADual port SRAM memory for run time use in FPGA integrated circuitsVANTIS CORP·Filed 1997·Granted Oct 3, 2000·58 cites·44 claims
- 3086US10148472B2Clock recovery and data recovery for programmable logic devicesLATTICE SEMICONDUCTOR CORP·Filed 2017·Granted Dec 4, 2018·4 cites·20 claims
- 3184US6211695B1FPGA integrated circuit having embedded SRAM memory blocks with registered address and data input sectionsVANTIS CORP·Filed 1999·Granted Apr 3, 2001·41 cites·66 claims
- 3284US6100715AMethods for configuring FPGA's having variable grain blocks and logic for providing time-shared access to interconnect resourcesVANTIS CORP·Filed 1998·Granted Aug 8, 2000·46 cites·8 claims
- 3384US5751164AProgrammable logic device with multi-level power controlADVANCED MICRO DEVICES INC·Filed 1996·Granted May 12, 1998·46 cites·11 claims
- 3484US5596524ACMOS memory cell with gate oxide of both NMOS and PMOS transistors as tunneling window for program and eraseADVANCED MICRO DEVICES INC·Filed 1995·Granted Jan 21, 1997·52 cites·8 claims
- 3583US6714043B1Output buffer having programmable drive current and output voltage limitsLATTICE SEMICONDUCTOR CORP·Filed 2002·Granted Mar 30, 2004·27 cites·13 claims
- 3683US5410268ALatching zero-power sense amplifier with cascodeADVANCED MICRO DEVICES INC·Filed 1993·Granted Apr 25, 1995·37 cites·27 claims
- 3781US6870391B1Input buffer with CMOS driver gate current control enabling selectable PCL, GTL, or PECL compatibilityLATTICE SEMICONDUCTOR CORP·Filed 2002·Granted Mar 22, 2005·22 cites·20 claims
- 3881US6081473AFPGA integrated circuit having embedded sram memory blocks each with statically and dynamically controllable read modeLATTICE SEMICONDUCTOR CORP·Filed 1998·Granted Jun 27, 2000·41 cites·17 claims
- 3980US6760209B1Electrostatic discharge protection circuitLATTICE SEMICONDUCTOR CORP·Filed 2002·Granted Jul 6, 2004·26 cites·15 claims
- 4080US6720755B1Band gap reference circuitLATTICE SEMICONDUCTOR CORP·Filed 2002·Granted Apr 13, 2004·27 cites·14 claims
- 4180US6034544AProgrammable input/output block (IOB) in FPGA integrated circuitsLATTICE SEMICONDUCTOR CORP·Filed 1997·Granted Mar 7, 2000·37 cites·5 claims
- 4279US5808942AField programmable gate array (FPGA) having an improved configuration memory and look up tableADVANCED MICRO DEVICES INC·Filed 1996·Granted Sep 15, 1998·36 cites·9 claims
- 4377US5760609AClock signal providing circuit with enable and a pulse generator with enable for use in a block clock circuit of a programmable logic deviceADVANCED MICRO DEVICES INC·Filed 1996·Granted Jun 2, 1998·27 cites·3 claims
- 4476US6028758AElectrostatic discharge (ESD) protection for a 5.0 volt compatible input/output (I/O) in a 2.5 volt semiconductor processVANTIS CORP·Filed 1998·Granted Feb 22, 2000·38 cites·16 claims
- 4576US4855711AImpact detection apparatusSENSOR SCIENCE·Filed 1987·Granted Aug 8, 1989·70 cites·19 claims
- 4673US6526558B2Methods for configuring FPGA's having variable grain blocks and shared logic for providing symmetric routing of result output to differently-directed and tristateable interconnect resourcesLATTICE SEMICONDUCTOR CORP·Filed 2000·Granted Feb 25, 2003·14 cites·15 claims
- 4771US10326627B2Clock recovery and data recovery for programmable logic devicesLATTICE SEMICONDUCTOR CORP·Filed 2017·Granted Jun 18, 2019·1 cites·21 claims
- 4871US6798244B1Output buffer with overvoltage protectionLATTICE SEMICONDUCTOR CORP·Filed 2002·Granted Sep 28, 2004·15 cites·14 claims
- 4971US6228696B1Semiconductor-oxide-semiconductor capacitor formed in integrated circuitVANTIS CORP·Filed 1998·Granted May 8, 2001·27 cites·22 claims
- 5071US5990702AFlexible direct connections between input/output blocks (IOBs) and variable grain blocks (VGBs) in FPGA integrated circuitsVANTIS CORP·Filed 1997·Granted Nov 23, 1999·25 cites·44 claims
Showing the top 50 of 105 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →